[coreboot] ASRock ConRoeXFire-eSATA2 board support

PaulK paulk at paulk.fr
Sat Nov 19 12:53:33 CET 2011

Hi! I'm new to this list so I'll start by introducing myself a bit: I'm
a french student involved in free software: I use GNU/Linux distros on
all my PCs, mostly with the fully free Trisquel distro and I'm also a
developer (I know C quite well) mostly involved in the Replicant project
(fully free Android derivate) as a hacker (lower-level stuff). 

The lead dev on the project (GNUtoo) decided to look at how doable it is
to port his board to coreboot, so I decided to follow his lead and look
at which of the motherboards I own would be the best one for coreboot. I
have 2 boards that might be good candidates, ASRock ConRoeXFire-eSATA2
(which has a socketed PLCC32 chip) and Asus P5LP-LE (Lithium) with a
soldered PLCC32 chip. Both boards should have supported
North/Southbridge and SuperIO already supported in coreboot. 

I decided to start the work on the ASRock ConRoeXFire-eSATA2 one and
thanks to the help I got on IRC, it has been possible to add support for
the board on flashrom in a few hours. I also found another compatible
flash (same size, even same model apparently) so I can use it to flash
coreboot images.

So here are the technical details now:
* northbridge is Intel Corporation 82945G/GZ/P/PL
* southbridge is Intel Corporation N10/ICH 7 Family
* superio is Winbond W83627EHG 
(see lspci out for more details)

So the board coming closer to mine is Kontron 986LCD-M/mITX. I forked
the device files for this one and I did this:
* replaced W83627THG references to W83627EHG 
* used superio init function from another board (ASUS A8V-E SE)
* modified this function to have clcksel to 48MHz (as told on IRC)
* called w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); between
superio init and console init

So far I got serial working, but the northbridge I use isn't the exact
model on the board and the model on the board isn't supported by
coreboot. Though: some stuff seems to work with the other northbridge
code and I found wide documentation about the intel 945G/GZ/P/PL chip

So I'm wondering what the next steps are… Adding support for the correct
Paul Kocialkowski 

* Website       : http://www.paulk.fr/
* Blog          : http://blog.paulk.fr/
* Microblogging : http://status.paulk.fr/
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