[coreboot] New patch to review for coreboot: e8d0122 RS780: print the vgainfo
Denis Carikli (GNUtoo@no-log.org)
gerrit at coreboot.org
Sun Nov 27 18:59:48 CET 2011
Denis Carikli (GNUtoo at no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/456
-gerrit
commit e8d0122db0712a3a188c9ca85e1fb6325f2eb592
Author: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
Date: Sun Nov 27 13:43:16 2011 +0100
RS780: print the vgainfo
Change-Id: I17c2a13ab52a0f78588f812d4f42f45f9a7b7524
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
---
src/southbridge/amd/rs780/gfx.c | 80 +++++++++++++++++++++++++++++++++++++++
1 files changed, 80 insertions(+), 0 deletions(-)
diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c
index 65a5e2b..29a6394 100644
--- a/src/southbridge/amd/rs780/gfx.c
+++ b/src/southbridge/amd/rs780/gfx.c
@@ -575,6 +575,86 @@ static void internal_gfx_pci_dev_init(struct device *dev)
/* Poweron DDI Lanes */
poweron_ddi_lanes(nb_dev);
+ printk(BIOS_DEBUG,"vgainfo:\n"
+ " ulBootUpEngineClock:%lu \n"
+ " ulBootUpUMAClock:%lu \n"
+ " ulBootUpSidePortClock:%lu \n"
+ " ulMinSidePortClock:%lu \n"
+ " ulSystemConfig:%lu \n"
+ " ulBootUpReqDisplayVector:%lu \n"
+ " ulOtherDisplayMisc:%lu \n"
+ " ulDDISlot1Config:%lu \n"
+ " ulDDISlot2Config:%lu \n"
+
+ " ucMemoryType:%u \n"
+ " ucUMAChannelNumber:%u \n"
+ " ucDockingPinBit:%u \n"
+ " ucDockingPinPolarity:%u \n"
+
+ " ulDockingPinCFGInfo:%lu \n"
+ " ulCPUCapInfo: %lu \n"
+
+ " usNumberOfCyclesInPeriod:%hu \n"
+ " usMaxNBVoltage:%hu \n"
+ " usMinNBVoltage:%hu \n"
+ " usBootUpNBVoltage:%hu \n"
+
+ " ulHTLinkFreq:%lu \n"
+
+ " usMinHTLinkWidth:%hu \n"
+ " usMaxHTLinkWidth:%hu \n"
+ " usUMASyncStartDelay:%hu \n"
+ " usUMADataReturnTime:%hu \n"
+ " usLinkStatusZeroTime:%hu \n"
+
+ " ulHighVoltageHTLinkFreq:%lu \n"
+ " ulLowVoltageHTLinkFreq:%lu \n"
+
+ " usMaxUpStreamHTLinkWidth:%hu \n"
+ " usMaxDownStreamHTLinkWidth:%hu \n"
+ " usMinUpStreamHTLinkWidth:%hu \n"
+ " usMinDownStreamHTLinkWidth:%hu \n",
+
+ (unsigned long)vgainfo.ulBootUpEngineClock,
+ (unsigned long)vgainfo.ulBootUpUMAClock,
+ (unsigned long)vgainfo.ulBootUpSidePortClock,
+ (unsigned long)vgainfo.ulMinSidePortClock,
+ (unsigned long)vgainfo.ulSystemConfig,
+ (unsigned long)vgainfo.ulBootUpReqDisplayVector,
+ (unsigned long)vgainfo.ulOtherDisplayMisc,
+ (unsigned long)vgainfo.ulDDISlot1Config,
+ (unsigned long)vgainfo.ulDDISlot2Config,
+
+ vgainfo.ucMemoryType,
+ vgainfo.ucUMAChannelNumber,
+ vgainfo.ucDockingPinBit,
+ vgainfo.ucDockingPinPolarity,
+
+ (unsigned long)vgainfo.ulDockingPinCFGInfo,
+ (unsigned long)vgainfo.ulCPUCapInfo,
+
+ vgainfo.usNumberOfCyclesInPeriod,
+ vgainfo.usMaxNBVoltage,
+ vgainfo.usMinNBVoltage,
+ vgainfo.usBootUpNBVoltage,
+
+ (unsigned long)vgainfo.ulHTLinkFreq,
+
+ vgainfo.usMinHTLinkWidth,
+ vgainfo.usMaxHTLinkWidth,
+ vgainfo.usUMASyncStartDelay,
+ vgainfo.usUMADataReturnTime,
+ vgainfo.usLinkStatusZeroTime,
+
+ (unsigned long)vgainfo.ulHighVoltageHTLinkFreq,
+ (unsigned long)vgainfo.ulLowVoltageHTLinkFreq,
+
+ vgainfo.usMaxUpStreamHTLinkWidth,
+ vgainfo.usMaxDownStreamHTLinkWidth,
+ vgainfo.usMinUpStreamHTLinkWidth,
+ vgainfo.usMinDownStreamHTLinkWidth);
+
+
/* Transfer the Table to VBIOS. */
pointer = (u32 *)&vgainfo;
for(i=0; i<sizeof(ATOM_INTEGRATED_SYSTEM_INFO_V2); i+=4)
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