[coreboot] "WARNING: BIOS bug: CPU MTRRs don't cover all of memory" loosing 2048MB of ram

yhlu yinghailu at gmail.com
Wed Oct 5 00:26:09 CEST 2011

On Tue, Oct 4, 2011 at 2:43 PM, Oskar Enoksson <enok at lysator.liu.se> wrote:
> It looks to me like  AMD K8 processors don't have this feature.
> On pp 314 of AMD Family 10 BKDG the bit is described "Tom2ForceMemTypeWB:
> top of memory 2 memory type write back. "
> On pp 369 of AMD Hammer BKDG bits 22-64 are all Reserved.
> So coreboot is wrong assuming there is such mechanism on amdk8.

only cpus after K8 rev F (included), have that feature.

corresponding kernel code:

 * Newer AMD K8s and later CPUs have a special magic MSR way to force WB
 * for memory >4GB. Check for that here.
 * Note this won't check if the MTRRs < 4GB where the magic bit doesn't
 * apply to are wrong, but so far we don't know of any such case in the wild.
#define Tom2Enabled             (1U << 21)
#define Tom2ForceMemTypeWB      (1U << 22)

int __init amd_special_default_mtrr(void)
        u32 l, h;

        if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
                return 0;
        if (boot_cpu_data.x86 < 0xf)
                return 0;
        /* In case some hypervisor doesn't pass SYSCFG through: */
        if (rdmsr_safe(MSR_K8_SYSCFG, &l, &h) < 0)
                return 0;
         * Memory between 4GB and top of mem is forced WB by this magic bit.
         * Reserved before K8RevF, but should be zero there.
        if ((l & (Tom2Enabled | Tom2ForceMemTypeWB)) ==
                 (Tom2Enabled | Tom2ForceMemTypeWB))
                return 1;
        return 0;

More information about the coreboot mailing list