[coreboot] Issues with Supermicro H8SCM
marcj303 at gmail.com
Fri Oct 7 21:44:48 CEST 2011
On Fri, Oct 7, 2011 at 1:10 PM, Thomas Gstädtner <thomas at gstaedtner.net> wrote:
> On Wed, Oct 5, 2011 at 20:08, Marc Jones <marcj303 at gmail.com> wrote:
>> On Tue, Oct 4, 2011 at 5:26 PM, Thomas Gstädtner <thomas at gstaedtner.net> wrote:
>>> Hi everyone,
>>> I own a Supermicro H8SCM-F-O mainboard (AMDs SP5100 Chipset), one of
>>> the boards AMD as of recently claims to officially support.
>>> So I decided to try coreboot, but (as expected) it is not really an
>>> out-of-the-box experience.
>>> First of all, flashrom does not support flashing out-of-the-box, but
>>> Frederic Temporelli's patches (
>>> http://patchwork.coreboot.org/patch/3326/ and
>>> http://patchwork.coreboot.org/patch/3326/ ) work fine for me (I tested
>>> multiple reads and multiple writes, always worked), I can report that
>>> to the flashrom list separately if you want.
>>> I built coreboot from the gerrit-branch (also tried a "stable"
>>> revision), coreboot-4.0-1714-gf8adf7a, using the "default"
>>> board-config incl. seabios (stable) as payload.
>>> After powering on nothing happens (apart from the fans running and the
>>> power led flashing) and it stays that way, it is silent on VGA as well
>>> as serial.
>>> After manually triggering a reset I immediately get the following
>>> output on serial:
>>> coreboot-4.0-1714-gf8adf7a Wed Oct 5 00:31:05 CEST 2011 starting...
>>> BSP Family_Model:
>>> Here it hangs, and I don't quite know how to move on and debug the issue.
>>> Can you give me any hints where to go on from here? I have external
>>> flashing equipment at hand (which also works fine btw.), but no fancy
>>> bios-debugging hardware.
>>> P.S. In case anyone else stumbles upon it: the board has 2 separate
>>> flash chips, one Macronix MX25L12845E with 128 Mbit (the SOIC16W
>>> package on the left of the board) as well as a SST25VF016B, 16 Mbit,
>>> as the SOIC8W on the right. The first one holds the IPMI firmware, the
>>> second one the AMI BIOS.
>>> Flashing requires a testclip or some really serious soldering skills.
>>> Attaching a SO8 socket can only be done with hot air soldering.
>> Hi Thomas,
>> Thanks for the report. While many people overlap with the flashrom
>> list, please post about those patches on that list. Seems that you
>> should be able to ack them.
>> It looks like maybe the platform build doesn't support your CPU.
>> There have been a number of recent contributions from AMD, but they
>> don't all align with the platform contributions. So, the H8SCM should
>> support all fam10 revD, but may have issue with Fam10 rev E. To get
>> more information, you can turn the console debug output to SPEW in
> Thanks for the advice Marc,
> I already had the loglevel set to spew (8). I additionally tried the
> other "Verbose output" debugging options, unfortunately I don't get
> any output at all when they are built in.
> Also, while it is hard to find and AMD doesn't have any official
> document confirming this, according to some google hits the processor
> should be revision D1 not rev E (AMD model number: OS4170OFU6DGOWOF ).
> (Sry for sending the mail twice, hit the wrong button)
Oh, I just recalled something about the H8SCM. There is jumper to
disable the bmc which might have a watchdog that coreboot can't deal
with. Did you disable that?
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