[coreboot] New patch to review for coreboot: 7f8e685 Load an IDT with NULL limit

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Thu Oct 13 00:48:59 CEST 2011


Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/259

-gerrit

commit 7f8e685996f65f2c67d1113fcfaab33ccc385da7
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Wed Jun 1 14:01:46 2011 -0700

    Load an IDT with NULL limit
    
    Load an IDT with NULL limit to prevent the 16bit IDT being used
    in protected mode before c_start.S sets up a 32bit IDT when entering
    ram stage.
    
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
    Change-Id: I8d048c894c863ac4971fcef8f065be6b899e1d3e
---
 src/cpu/x86/16bit/entry16.inc |   15 ++++++++++++++-
 src/cpu/x86/16bit/entry16.lds |    1 +
 2 files changed, 15 insertions(+), 1 deletions(-)

diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc
index 1eb92c8..9f4c0e3 100644
--- a/src/cpu/x86/16bit/entry16.inc
+++ b/src/cpu/x86/16bit/entry16.inc
@@ -45,7 +45,6 @@ _start:
 	xorl	%eax, %eax
 	movl	%eax, %cr3    /* Invalidate TLB*/
 
-
 	/* Invalidating the cache here seems to be a bad idea on
 	 * modern processors.  Don't.
 	 * If we are hyperthreaded or we have multiple cores it is bad,
@@ -55,6 +54,13 @@ _start:
 	 * entry16.inc.
 	 */
 
+	/* Load an IDT with NULL limit to prevent the 16bit IDT being used
+	 * in protected mode before c_start.S sets up a 32bit IDT when entering
+	 * ram stage.
+	 */
+	movw $nullidt_offset, %bx
+	lidt %cs:(%bx)
+
 	/* Note: gas handles memory addresses in 16 bit code very poorly.
 	 * In particular it doesn't appear to have a directive allowing you
 	 * associate a section or even an absolute offset with a segment register.
@@ -118,6 +124,13 @@ gdtptr16:
 	.word	gdt_end - gdt -1 /* compute the table limit */
 	.long	gdt		 /* we know the offset */
 
+.align	4
+.globl nullidt
+nullidt:
+	.word	0	/* limit */
+	.long	0
+	.word	0
+
 .globl _estart
 _estart:
 	.code32
diff --git a/src/cpu/x86/16bit/entry16.lds b/src/cpu/x86/16bit/entry16.lds
index 0580f0e..112d429 100644
--- a/src/cpu/x86/16bit/entry16.lds
+++ b/src/cpu/x86/16bit/entry16.lds
@@ -1 +1,2 @@
 	gdtptr16_offset = gdtptr16 & 0xffff;
+	nullidt_offset = nullidt & 0xffff;




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