[coreboot] New patch to review for coreboot: 7ae18c2 Fix our CMOS checksum algorithm so it matches what /dev/nvram expects

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Sat Oct 15 00:27:09 CEST 2011

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/279


commit 7ae18c212c2ccca0c7f4691db0bfb5c89d8ce0ac
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Fri Oct 14 15:24:03 2011 -0700

    Fix our CMOS checksum algorithm so it matches what /dev/nvram expects
    Our cmos checksum is inverted to what the Linux /dev/nvram device expects (and
    BIOSes use). This makes it impossible to use /dev/nvram with coreboot. Fix it!
    Change-Id: I239f7e3aca05d3691aee16490dd801df2ccaefd1
    Signed-off-by: Vadim Bendebury <vbendeb at google.com>
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
 src/pc80/mc146818rtc.c |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/src/pc80/mc146818rtc.c b/src/pc80/mc146818rtc.c
index f3bee9b..034957a 100644
--- a/src/pc80/mc146818rtc.c
+++ b/src/pc80/mc146818rtc.c
@@ -98,7 +98,6 @@ static void rtc_set_checksum(int range_start, int range_end, int cks_loc)
 	for(i = range_start; i <= range_end; i++) {
 		sum += cmos_read(i);
-	sum = ~(sum & 0x0ffff);
 	cmos_write(((sum >> 8) & 0x0ff), cks_loc);
 	cmos_write(((sum >> 0) & 0x0ff), cks_loc+1);

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