[coreboot] How to make "System Restart after Power Fail" working on SB800?

[mopz0506 mopz0506]

Hi,

I fetch and read the RRG for SB700, found PMIO_REG74 is PwrFailShadow.

for SB800 there is no PwrFailShadow any more, instead AMD give it a
new, nonsense name, RtcShadow / RtcShawdow (typo?) and put it to
 PMIO_REG5B. Sucks.

I download SB800 BDG following URL in coreboot Wiki, PN is
 "45483_sb800_bdg_pub_3.02".

I check the SB900 code and there is a function AcLossControl(), which
 used RtcShadow to control "System Restart after Power Fail".

So I guess the BDG v3.02 for SB800 (3.6, P20) is a mistake. Maybe
someone copy & paste it from SB700 Guide (in a bugfix , Rev. 1.01,
 ha ha!)

Anyway I change

const static AcpiRegWrite sbPmioPorInitTable[] = {
   ... ...
{PMIO_BASE >> 8,  SB_PMIOA_REG5B, 0xF9, BIT1 + BIT2},
   ... ...
}

to

1) {PMIO_BASE >> 8,  SB_PMIOA_REG5B, 0xF0, BIT0 + BIT2},
2) {PMIO_BASE >> 8,  SB_PMIOA_REG5B, 0xF0, BIT0 + BIT2 + BIT3},

both still does not work and I had to press POWER button.

Any idea?

Thanks,

mopz0506

On Sat, Oct 15, 2011 at 9:57 AM, mopz0506 mopz0506 <mopz0506 at gmail.com> wrote:
> Hi,
>
> My mainboard is ASRock E350M1, it's sourthbridge is AMD SB800.
>
> I want the machine to restart once I connect the power cable to
> it, without press the POWER button on the front panel.
>
> The ASRock's EFI BIOS can do this by set "Always Power On" to
> "enable".
>
> At present the coreboot (the cimx module) seems does not touch
> "System Restart after Power Fail" feature.
>
> If I use vendor's EFI BIOS and set "always restart after the
> power is restored", then flash the coreboot to it, the box always
> restart when power connected and I need not to press the POWER
> button.
>
> If I use vendor's EFI BIOS and set "keep power off after the
> power is restored", then flash the coreboot to it, the box does
> not up and I must press the POWER button.
>
> If I clear the BIOS by connect the jumper to (pin1 - pin2), then
> all setting lost and I must press the POWER button.
>
> So seems the coreboot just use the setting (but never set it).
>
> I think the code is in src\vendorcode\amd\cimx\sb800\SBPOR.c
>
> const static AcpiRegWrite sbPmioPorInitTable[] =
>    ......
> {PMIO_BASE >> 8,  SB_PMIOA_REG74, 0xF6, BIT0 + BIT3},
>    ......
> }
>
> and yes it does not touch the BIT1.
>
> The BIOS Developer's Guide 3.6, P20, said I must to set
> PMIO 74h [bits 1:0] to [01b] to get "always power on" working.
> [00] / [10] / [11] does not work as what I hope.
>
> So I change the line to always clean BIT1 to 0, as BDG required,
>
> {PMIO_BASE >> 8,  SB_PMIOA_REG74, 0xF4, BIT0 + BIT3},
>
> (just for test, I think the proper way is give a
>  pConfig->OEMPROGTBL.OemProgrammingTablePtr_Ptr to overwrite
>  CIMX's default setting)
>
> but it has no effect, the box keep off until I press POWER button.
>
> before this code PMIO 24h [AcpiMMioEn] has been enabled so
> MMIO working.
>
> I checked the SB700 code src\southbridge\amd\sb700\sm.c, to see
> how coreboot set "power_on_after_fail" bit in other chipset.
>
> =================== code start =================
> /* power after power fail */
>
> on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
>
> get_option(&on, "power_on_after_fail");
>
> byte = pm_ioread(0x74);
>
> byte &= ~0x03;
>
> if (on) {
>    byte |= 2;
> }
>
> byte |= 1 << 2;
>
> pm_iowrite(0x74, byte);
>
> printk(BIOS_INFO, "set power %s after power fail\n", on ? "on" : "off");
> =================== code end =================
>
> what it did is a litter different and always set bit0 to 0 (CIMX set bit0
> to 1, which is required by the manual):
>
> 1) clear bit[1:0] to [00b]
> 2) set bit[1] to [1b]
> 3) set bit[2] to [1b]
>
> I don't know this code working or not since I do not own a SB700 mainboard.
>
> If I did it on SB800 as below
>
> {PMIO_BASE >> 8,  SB_PMIOA_REG74, 0xFC, BIT1 + BIT2},
>
> coreboot fail to boot.
>
> SB800 obsolete those coreboot code and replace it with new CIMX code.
>
> I read the documents about all PM registers, and found nothing.
> I search "power" in the whole .pdf, but most of them is difficult to
>  understand for me.
> I search the archive of mail list and seems every mainboard has different
> method to set this feature.
>
> I had tried set it on superio code (Winbond W83267hf), and does not work.
>
> Also I observe that BIT0 is "Decen_acpi", and BIT1 is "Gbl_en_en", and
> they are not "power on after power fail" bit.
>
> Did I did anything wrong?
>
> Did these bits need some ACPI code to working?
>
> When the power cable connected, before I press the POWER button, the
> mainboard keeps off due to the setting. in this case, the BIOS code
> running or not?
>
> Any suggesting?
>
> Thanks for your help in advance,
>
> mopz0506
>