[coreboot] Patch set updated for coreboot: b403fdf Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Sun Oct 30 20:57:29 CET 2011


Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/358

-gerrit

commit b403fdfcb1e44dddee30be9820e7e1db5a41764c
Author: Rudolf Marek <r.marek at assembler.cz>
Date:   Sun Oct 30 18:06:58 2011 +0100

    Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9
    
    It is meant to be a address and not a dereference. Otherwise MTRR
    is filled with code and not with the address.
    
    This is what I hate at most on the AT&T syntax. Instead of taking
    the address, it was a dereference. Not greatly visible, except
    I wondered why opcode is not 0xb4 but 0xa1 and it took another
    half an our to see it.
    
    Change-Id: I6b339656024de8f6e6b3cde63b16b7ff5562d055
    Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
---
 src/cpu/amd/car/cache_as_ram.inc           |    2 +-
 src/cpu/intel/car/cache_as_ram.inc         |    2 +-
 src/cpu/intel/model_106cx/cache_as_ram.inc |    2 +-
 src/cpu/intel/model_6ex/cache_as_ram.inc   |    2 +-
 src/cpu/intel/model_6fx/cache_as_ram.inc   |    2 +-
 src/cpu/via/car/cache_as_ram.inc           |    6 +++---
 6 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index 9d2b400..b9e02f3 100644
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -290,7 +290,7 @@ clear_fixed_var_mtrr_out:
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
 	 * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
 	 */
-	movl	copy_and_run, %eax
+	movl	$copy_and_run, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
 	orl	$MTRR_TYPE_WRBACK, %eax
 	wrmsr
diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc
index 4ad2fce..26fec6e 100644
--- a/src/cpu/intel/car/cache_as_ram.inc
+++ b/src/cpu/intel/car/cache_as_ram.inc
@@ -241,7 +241,7 @@ clear_fixed_var_mtrr_out:
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
 	 * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
 	 */
-	movl	copy_and_run, %eax
+	movl	$copy_and_run, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
 	orl	$MTRR_TYPE_WRBACK, %eax
 	wrmsr
diff --git a/src/cpu/intel/model_106cx/cache_as_ram.inc b/src/cpu/intel/model_106cx/cache_as_ram.inc
index b45599a..9f7ceaf 100644
--- a/src/cpu/intel/model_106cx/cache_as_ram.inc
+++ b/src/cpu/intel/model_106cx/cache_as_ram.inc
@@ -106,7 +106,7 @@ clear_mtrrs:
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
 	 * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
 	 */
-	movl	copy_and_run, %eax
+	movl	$copy_and_run, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
 	orl	$MTRR_TYPE_WRBACK, %eax
 	wrmsr
diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc
index fa35fc9..3a12cf6 100644
--- a/src/cpu/intel/model_6ex/cache_as_ram.inc
+++ b/src/cpu/intel/model_6ex/cache_as_ram.inc
@@ -106,7 +106,7 @@ clear_mtrrs:
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
 	 * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
 	 */
-	movl	copy_and_run, %eax
+	movl	$copy_and_run, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
 	orl	$MTRR_TYPE_WRBACK, %eax
 	wrmsr
diff --git a/src/cpu/intel/model_6fx/cache_as_ram.inc b/src/cpu/intel/model_6fx/cache_as_ram.inc
index a869011..2ba1872 100644
--- a/src/cpu/intel/model_6fx/cache_as_ram.inc
+++ b/src/cpu/intel/model_6fx/cache_as_ram.inc
@@ -113,7 +113,7 @@ clear_mtrrs:
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
 	 * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
 	 */
-	movl	copy_and_run, %eax
+	movl	$copy_and_run, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
 	orl	$MTRR_TYPE_WRBACK, %eax
 	wrmsr
diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc
index d0c43c9..ad2805e 100644
--- a/src/cpu/via/car/cache_as_ram.inc
+++ b/src/cpu/via/car/cache_as_ram.inc
@@ -120,7 +120,7 @@ clear_fixed_var_mtrr_out:
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
 	 * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
 	 */
-	movl	copy_and_run, %eax
+	movl	$copy_and_run, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
 	orl	$MTRR_TYPE_WRBACK, %eax
 	wrmsr
@@ -166,7 +166,7 @@ clear_fixed_var_mtrr_out:
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
 	 * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
 	 */
-	movl	copy_and_run, %esi
+	movl	$copy_and_run, %esi
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %ei
 	movl	%esi, %edi
 	movl	$(CONFIG_XIP_ROM_SIZE >> 2), %ecx
@@ -247,7 +247,7 @@ testok:
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
 	 * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
 	 */
-	movl	copy_and_run, %eax
+	movl	$copy_and_run, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
 	orl	$MTRR_TYPE_WRBACK, %eax
 	wrmsr




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