[coreboot] Trouble with cbfstool when attempting dualboot

[Patrick Georgi]

Am Montag, 31. Oktober 2011 07:32:50 schrieb Kyösti Mälkki:
> If my new normal/romstage is built with GCC for Cache-As-Ram, the same
> alignment does not apply and on boot it halts before any serial output.
Does it "halt" or is it just _very_ slow (several minutes until the 
first life sign on serial)? The latter would indicate wrong MTRR setup, 
while the former is a more fundamental problem.

> CONFIG_XIP_ROM_BASE seems obsolete? 
It should. I'll take a look.

> Could you take CONFIG_XIP_ROM_SIZE
> from romstage CBFS-header and round that up? This is now 64kB while my
> romstage takes<16kB. So this wastes precious space on flash device.
Good suggestion - a "range" operator for looking for the location which 
aligns the block with the neighbor.
Just rounding up isn't enough in all cases.


Patrick