[coreboot] New patch to review for coreboot: 95ca382 AMD Agesa changes to fix F14 boot issues
Frank Vibrans III (frank.vibrans@amd.com)
gerrit at coreboot.org
Wed Sep 14 23:52:31 CEST 2011
Frank Vibrans III (frank.vibrans at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/215
-gerrit
commit 95ca38286912069da0c9251972cc3665d24d8a83
Author: efdesign98 <efdesign98 at gmail.com>
Date: Wed Sep 14 15:52:09 2011 -0600
AMD Agesa changes to fix F14 boot issues
This collection of changes fixes a buffer addressing
issue by removing one level of indirection, fixes an
Agesa HT mailbox retrieval bug, and fixes a buffer
location-by-signature issue.
Change-Id: Ic8a8cb3f9abddd9ad59343a85dbbee5aa7633be3
Signed-off-by: Frank Vibrans <frank.vibrans at amd.com>
Signed-off-by: efdesign98 <efdesign98 at gmail.com>
---
.../f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c | 16 ++++++++--------
.../GNB/Modules/GnbPcieConfig/PcieConfigData.c | 2 +-
.../f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c | 2 +-
.../amd/agesa/f14/Proc/HT/Fam14/htNbFam14.c | 4 ++--
.../agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.c | 13 ++++++++++++-
.../agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.h | 7 ++++++-
6 files changed, 30 insertions(+), 14 deletions(-)
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c
index a1fd419..b2b96f7 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c
@@ -188,7 +188,7 @@ PcieAlibBuildAcpiTable (
LibAmdMemCopy (AlibSsdtBuffer, &AlibSsdt[0], AlibSsdtlength, StdHeader);
// Set PCI MMIO configuration
// AmlObjName = '10DA';
- AmlObjName = Int32FromChar ('1', '0', 'D', 'A');
+ AmlObjName = Int32FromChar ('A', 'D', '0', '1');
AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName));
if (AmlObjPtr != NULL) {
UINT64 MsrReg;
@@ -205,7 +205,7 @@ PcieAlibBuildAcpiTable (
PpFuseArray = GnbLocateHeapBuffer (AMD_PP_FUSE_TABLE_HANDLE, StdHeader);
if (PpFuseArray != NULL) {
// AmlObjName = '30DA';
- AmlObjName = Int32FromChar ('3', '0', 'D', 'A');
+ AmlObjName = Int32FromChar ('A', 'D', '0', '3');
AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName));
ASSERT (AmlObjPtr != NULL);
if (AmlObjPtr != NULL) {
@@ -235,7 +235,7 @@ PcieAlibBuildAcpiTable (
}
}
// AmlObjName = '40DA';
- AmlObjName = Int32FromChar ('4', '0', 'D', 'A');
+ AmlObjName = Int32FromChar ('A', 'D', '0', '4');
AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName));
ASSERT (AmlObjPtr != NULL);
if (AmlObjPtr != NULL) {
@@ -244,7 +244,7 @@ PcieAlibBuildAcpiTable (
Status = AGESA_ERROR;
}
// AmlObjName = '50DA';
- AmlObjName = Int32FromChar ('5', '0', 'D', 'A');
+ AmlObjName = Int32FromChar ('A', 'D', '0', '5');
AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName));
ASSERT (AmlObjPtr != NULL);
if (AmlObjPtr != NULL) {
@@ -255,7 +255,7 @@ PcieAlibBuildAcpiTable (
// Set PCIe configuration
if (PcieLocateConfigurationData (StdHeader, &Pcie) == AGESA_SUCCESS) {
// AmlObjName = '20DA';
- AmlObjName = Int32FromChar ('2', '0', 'D', 'A');
+ AmlObjName = Int32FromChar ('A', 'D', '0', '2');
AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName));
ASSERT (AmlObjPtr != NULL);
if (AmlObjPtr != NULL) {
@@ -264,7 +264,7 @@ PcieAlibBuildAcpiTable (
Status = AGESA_ERROR;
}
// AmlObjName = '60DA';
- AmlObjName = Int32FromChar ('6', '0', 'D', 'A');
+ AmlObjName = Int32FromChar ('A', 'D', '0', '6');
AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName));
ASSERT (AmlObjPtr != NULL);
if (AmlObjPtr != NULL) {
@@ -278,7 +278,7 @@ PcieAlibBuildAcpiTable (
Status = AGESA_ERROR;
}
// AmlObjName = '80DA';
- AmlObjName = Int32FromChar ('6', '0', 'D', 'A');
+ AmlObjName = Int32FromChar ('A', 'D', '0', '8');
AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName));
ASSERT (AmlObjPtr != NULL);
if (AmlObjPtr != NULL) {
@@ -292,7 +292,7 @@ PcieAlibBuildAcpiTable (
Status = AGESA_ERROR;
}
// AmlObjName = '70DA';
- AmlObjName = Int32FromChar ('6', '0', 'D', 'A');
+ AmlObjName = Int32FromChar ('A', 'D', '0', '7');
AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName));
ASSERT (AmlObjPtr != NULL);
if (AmlObjPtr != NULL) {
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c
index d911847..16167d2 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c
@@ -153,7 +153,7 @@ PcieConfigurationInit (
IDS_ERROR_TRAP;
return AGESA_FATAL;
}
- Pcie->ComplexList[ComplexIndex].SiliconList = (PCIe_SILICON_CONFIG *) &Buffer;
+ Pcie->ComplexList[ComplexIndex].SiliconList = (PCIe_SILICON_CONFIG *) Buffer;
PcieFmBuildComplexConfiguration (Buffer, StdHeader);
for (Index = 0; Index < NumberOfComplexes; Index++) {
ComplexDescriptor = PcieInputParserGetComplexDescriptor (ComplexList, Index);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c
index ef6fae7..b984194 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c
@@ -120,7 +120,7 @@ PcieFmAlibBuildAcpiTable (
);
if (D18F4x15C.Field.BoostSrc != 0 || PpFuseArray->GpuBoostCap != 0) {
// AmlObjName = 'B0DA';
- AmlObjName = Int32FromChar ('B', '0', 'D', 'A');
+ AmlObjName = Int32FromChar ('A', 'D', '0', 'B');
AmlObjPtr = GnbLibFind (AlibSsdtPtr, ((ACPI_TABLE_HEADER*) &AlibSsdt[0])->TableLength, (UINT8*) &AmlObjName, sizeof (AmlObjName));
ASSERT (AmlObjPtr != NULL);
if (AmlObjPtr != NULL) {
diff --git a/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbFam14.c b/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbFam14.c
index baf39bd..3d4579a 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbFam14.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbFam14.c
@@ -7,7 +7,7 @@
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: HyperTransport
- * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $
+ * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
*
*/
/*
@@ -128,7 +128,7 @@ CONST NORTHBRIDGE ROMDATA HtFam14Nb =
(PF_MAKE_LINK_BASE)CommonReturnZero32,
(PF_GET_MODULE_INFO)CommonVoid,
(PF_POST_MAILBOX)CommonVoid,
- (PF_RETRIEVE_MAILBOX)CommonReturnZero32,
+ Fam14RetrieveMailbox,
(PF_GET_SOCKET)CommonReturnZero8,
(PF_GET_ENABLED_COMPUTE_UNITS)CommonReturnZero8,
(PF_GET_DUALCORE_COMPUTE_UNITS)CommonReturnZero8,
diff --git a/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.c b/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.c
index f6475c4..b780b0b 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.c
@@ -10,7 +10,7 @@
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: HyperTransport
- * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $
+ * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
*
*/
/*
@@ -126,3 +126,14 @@ Fam14GetNodeCount (
return (1);
}
+AP_MAIL_INFO
+Fam14RetrieveMailbox (
+ IN UINT8 Node,
+ IN NORTHBRIDGE *Nb
+ )
+{
+ AP_MAIL_INFO NodeApMailBox;
+ ASSERT (Nb != NULL);
+ NodeApMailBox.Info = 0;
+ return NodeApMailBox;
+}
diff --git a/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.h b/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.h
index eeb84ec..533a79c 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.h
+++ b/src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.h
@@ -7,7 +7,7 @@
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: HyperTransport
- * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $
+ * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
*
*/
/*
@@ -60,4 +60,9 @@ Fam14GetNodeCount (
IN NORTHBRIDGE *Nb
);
+AP_MAIL_INFO
+Fam14RetrieveMailbox (
+ IN UINT8 Node,
+ IN NORTHBRIDGE *Nb
+ );
#endif // _HT_NB_UTILITIES_FAM14_H_
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