[coreboot] Patch merged into coreboot/master: f6bf251 Apply cache-as-ram conditionally on socket mPGA604

gerrit at coreboot.org gerrit at coreboot.org
Mon Apr 2 21:13:28 CEST 2012

the following patch was just integrated into master:
commit f6bf251e4434d69c7efc33a14b449b4972cfa67c
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Feb 28 14:01:34 2012 +0200

    Apply cache-as-ram conditionally on socket mPGA604
    The socket mPGA604 is for P4 Xeon which to my knowledge is always
    HT-enabled. I assume the existing usage of car/cache_as_ram.inc
    on socket_mPGA604, namely the Tyan S2735, as broken.
    Existing car/cache_as_ram.inc has invalid SIPI vector and it does
    not initialise AP CPU's to activate L2 cache.
    Other mPGA604 boards are not affected, as they have not been
    converted to CAR.
    Change-Id: I7320589695c7f6a695b313a8d0b01b6b1cafbb04
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>

Build-Tested: build bot (Jenkins) at Tue Feb 28 14:26:37 2012, giving +1
See http://review.coreboot.org/607 for details.


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