[coreboot] GSoC project ideas
p.f.j.geraedts at gmail.com
Wed Apr 4 08:19:01 CEST 2012
On Sat Mar 10 21:27:41 CET 2012, Carl-Daniel Hailfinger wrote:
> given the lack of affordable and available hardware tools for coreboot
> development, I propose to look for a different set of projects this
> year: Tools which would help developers, and which are usable especially
> with current hardware. A list of ideas follows.
> - Flash ICE device with SPI support.
> - Flash ICE device with LPC/FWH support.
> - Serial emulation for LPC buses on a configurable I/O port with USB
> output on the other side.
> - Dual serial emulation for two LPC buses either on the same device or
> with two identical devices and a fast bus in between.
> - Serial emulation for PCI buses (i.e. PCI/serial card).
Currently I am working towards items 1 and 3 of your list. Eventually I
want to use this hardware to replace the flash content of my MSI Wind
U100 netbook with free software (openec, coreboot, seabios, ipxe, grub2,
etc). I want to keep my implementation sufficiently generic to allow for
extensions like items 2, 4 and 5 of your list.
> As a basis for all those ideas I'd propose the Openbench logic sniffer.
> It has a fast FPGA, enough gates and roughly 32 kByte RAM. The FPGA is
> fast enough and big enough to accommodate the necessary logic, and we
> could easily attach a fast (66+ MHz) SPI flash chip to it. And with $50
> incl. shipping the OLS is not extremely cheap, but worth its price and
> easily available. Fast flash chips are also available for reasonable prices.
My hardware target is the Papilio platform in general ; basically the
FPGA variant of the Arduino platform. All current Papilio implementations
(to which I count the OLS) rely on UART over USB. Future boards are being
developed that implement more high-speed USB access, e.g. the OLS successor
I will try to make my VHDL cores so they will be compatible with both types
of boards. I plan to start with UART over USB support for the
Papilio boards. Basically flashrom SPI access, POST code access and serial
console access. This 'playground' should eventually give me enough insight
in an optimal implementation when targeting future boards.
At the moment I'm working towards a prototype of the hardware. When that is
finished I will post the details as a constructive basis for feedback and
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