[coreboot] New patch to review for coreboot: b16b60f Add Sandybridge/Cougar Point support to SMM relocation handler

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/874

-gerrit

commit b16b60fd585a776063526ccf589d6b21480ea174
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Thu Apr 5 15:59:33 2012 -0700

    Add Sandybridge/Cougar Point support to SMM relocation handler
    
    Previously this part of smmrelocate.S had to be omitted because
    the CONFIG_ options for those components did not exist yet. Add
    them back.
    
    Change-Id: I6ac94ca804e03062724401a08d1d174adac5e830
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
 src/cpu/x86/smm/smmrelocate.S |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S
index 18d668c..b752531 100644
--- a/src/cpu/x86/smm/smmrelocate.S
+++ b/src/cpu/x86/smm/smmrelocate.S
@@ -35,12 +35,20 @@
 #include "../../../southbridge/intel/i82801dx/i82801dx.h"
 #elif CONFIG_SOUTHBRIDGE_INTEL_SCH
 #include "../../../southbridge/intel/sch/sch.h"
+#elif CONFIG_SOUTHBRIDGE_INTEL_BD82X6X || CONFIG_SOUTHBRIDGE_INTEL_C216
+#include "../../../southbridge/intel/bd82x6x/pch.h"
 #else
 #error "Southbridge needs SMM handler support."
 #endif
 
 #if CONFIG_SMM_TSEG
 
+#if CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE || CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#define TSEG_BAR (DEFAULT_PCIEXBAR | TSEG)
+#else
+#error "Northbridge must define TSEG_BAR."
+#endif
 #include <cpu/x86/mtrr.h>
 
 #endif /* CONFIG_SMM_TSEG */