[coreboot] Patch merged into coreboot/master: a99159b Leverage the Pstate table created by AGESA.

gerrit at coreboot.org gerrit at coreboot.org
Thu Apr 19 01:04:47 CEST 2012

the following patch was just integrated into master:
commit a99159bd88b984957714dc8f123a8126b5e9404a
Author: zbao <fishbaozi at gmail.com>
Date:   Thu Apr 12 11:27:26 2012 +0800

    Leverage the Pstate table created by AGESA.
    The name of processor created by AGESA is P00n, whose P is
    BLDCFG_PROCESSOR_SCOPE_NAME(is 'C' if it is undefined.) and n starts
    from 0. The dsdt should be aligned with that.
    This feature has only been tested on persimmon. The changes on all the
    other boards were propagated.
    Change-Id: I8c3fa4b94406d530d2bed8e9a1f42b433bbec3ec
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: zbao <fishbaozi at gmail.com>

Build-Tested: build bot (Jenkins) at Wed Apr 18 05:26:29 2012, giving +1
Reviewed-By: Marc Jones <marcj303 at gmail.com> at Thu Apr 19 01:04:44 2012, giving +2
See http://review.coreboot.org/884 for details.


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