[coreboot] [geda-user] Re: Dual SPI Flash adapter attempt 2.0

Oliver Schinagl oliver+list at schinagl.nl
Fri Apr 27 11:32:35 CEST 2012

Wow, nice big review :D feedback!

On 04/27/12 02:08, Peter Stuge wrote:
> Oliver Schinagl wrote:
>> So the big question is; shall I send this to seeed for fabrication
>> or does it need some big change?
> The RN has slivers of soldermask between pads. Avoid this; it's too
> thin to work at all in production and the component size is so small
> that you want to avoid any chance of soldermask getting in the way
> of soldering. Board production processes are not exact, they are
> messy mechanically and chemically, and you should never push your
> producer's limits. If their limit is 6 never use less than 8.
That's just how the part comes. I haven't made or modified it. Is there 
some way to increase soldermask spacing or better yet, so set up some 
minimal with?

Their limit is 6, i've designed the board entirely using 8; however the 
U3 part, the FET switch just comes in this size, or smaller and would 
thus be impossible to use.

> The SMD ICs and RN all have the package outline on silk absolutely
> tight around the soldermask apertures. Avoid this, again because the
> silk is way too close to the pads, and you never want silk anywhere
> outside the solder mask.
Again, this is how the RN and SMD IC's come with PCB/gEDA. I could 
design new parts or remove the silk-screen from those parts and use 
custom parts, but if these parts are so 'flawed' they should be 
removed/modified from geda?

I do agree however that that ink will be close to the pads.

> The U3 "orientation marker" (the arc) is rotated 45 degrees.
You mean the u between pin 1 and pin 8? The half circle? I haven't 
spotted this or am not quite sure what you mean.

> The RN outline isn't closed.
That's how the part comes :( As above I suppose.

> Keep in mind that there will be chip mounted on U2 so your JP1 legend
> will never be visible. I would center JP1 and put a 1 and a 2 on each
> side, and put a 1 and a 2 near the corresponding flash chips.
Yes, I have thought of that too, but since U2 is a socket! this can be 
read when the chip is removed. I know it's far from ideal, but there's 
only very very limited space.

> I don't particularly like that the U1 pins use 2x a 4-pin header
> footprint. I would create a copy of the U2 footprint and adapt it to
> make room for the SO8 inside of it, to make it completely clear what
> goes mounted which way where.
I initially had this as an idea too, but I thought the two headers where 
more matching in what will eventually be installed. 2 header rows. 
Spacing for the SO8 shouldn't be a problem, as the headers will be 
facing the bottom and the SO8 sits on top.

> Make sure to check that the sockets and pin headers you will use
> actually fit in the holes that are in the footprints. Remember that
> the hole in the footprint file is what will get drilled. After
> drilling the holes will be plated, so the usable hole diameter is:
> $drillsize - 2 * $platingthickness
> Drills also never create nominal diameter holes, but always slightly
> smaller. It is quite annoying to have boards full of holes that are
> too small to fit the part.
Heh, I just assumed, whoever made those parts accounted for this. I am 
going to print it all on paper and see if things fit properly there. I 
will measure socket/header pin widths and make sure that drillsize -2 * 
platingthickness (if I can find this from seeed's spec) is big enough. I 
belive I can change the drill size quite easily in PCB?

> The 45 degree PCB corners look fancy but really just add annoying
> complexity and problems for the board house. Unneccessary complexity,
> strip it off and have simple 90 degree corners.
Ok, will do. I am guessing that i'll have to cut those boards myself. 
Since even if they let me subpanel them, I have to cut it myself anyhow.

Scorch with exacto knife and metal ruler and break :S

> The v in v0.1 and S in S1 on the bottom of the upper third board from
> left is too close to pin U2-5 and pad S1-2 respectively.
Fixed. But I did a very very close up with the soldermask enabled and 
didn't see it. Stil, there was room so I moved it.

> The right edge of 'r' in some silk text goes in between pads where I
> would make sure to keep clear.
But there was no room for my full name! I'll make it smaller if that 
could cause issues.

> There is way way too much silk for my taste. I don't like silk too
> much when space is tight except if something *really* needs to be
> explained. "JP1" is useless to all users. The *only* thing that needs
> to be explained on the PCBs is what jumper setting activates what
> flash chip. Explaining this with this little space is difficult!
> Adding the inverter logic gate makes the problem simpler to explain
> and means that JP1 has one less pin = more space for text, maybe
> "Orig" or such, which would be clear to the user because they put
> their original flash chip in the socket.
I actually tried to see if there was room for the additional inverter 
logic gate, but I couldn't make it work. I guess it will require some 
minimal manual?

> The silk of RN1 on the back of the third board from the left (as seen
> from the front or after pressing Shift-Tab) goes outside the soldermask
> aperture onto the keepout between the annular ring and the soldermask.
Fixed! Crap, I did miss that one. I had 1 more with he same mistake. 
Peer review is good!

> I would make the SMD pads extend longer "outwards" in order to make
> hand soldering easier.
I'd have to use a custom part for this? I had a SO8-W at some point, but 
the insides where shorter and it didn't properly fit. So how would I do 
this manually (First time PCB user, or EDA user in general :) without 
using a custom part ideally?

> I would completely drop U1 through hole pins and make the PCB
> strictly for a surface mounte U1. The board could become smaller
> and/or have a little more text explaining the jumper.
Yes! But! People who are lucky enough to use this board to plug into 
their existing socket, can remain using their existing chip, which has 
several advantages?
> All that said I believe you could manufacture this board and that the
> PCBs would work. (But they would be a bit tough to populate.)
I'll fix everything you mentioned (THANK YOU!) and will mail a fixed PCB 
later today/tomorrow to include all mentioned fixes by everyone.

As for the though to populate, for those who are handy enough to solder, 
can get the solder version. If the board is a success and is wanted to 
be given away at events, They'll have to be made prepopulated I suppose!

> //Peter


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