[coreboot] [SeaBIOS] Compiling SeaBIOS for coreboot has problems with its ACPI code
kevin at koconnor.net
Thu Aug 9 04:23:05 CEST 2012
On Tue, Aug 07, 2012 at 07:34:37PM +0000, Moore, Robert wrote:
> This is very interesting. If I understand correctly, you are using a
> utility plus various directives to generate tables of AML offsets --
> presumably in order to dynamically change AML values, correct?
Yes - exactly. We started off completely generating the SSDT
dynamically, but that got awkward when we needed to generate Processor
objects dynamically. So, we compiled an SSDT as template and then
patched it. It was fragile to hard-code the offsets, so a tool was
written to parse the IASL output and generate the offsets
I'm CC'ing the coreboot list - they have also been doing SSDT runtime
> I have to say that I have not seen anything like this, from any BIOS vendor.
> > By the way, is there interest in adding some of the functionality that
> > we get by parsing the listing to iasl directly?
> We are always interested in adding features to make the compiler
> more useful. What would you suggest?
The tool currently generates offsets and can rename the Amlcode
variable to something more unique. I'm sure additional features could
be thought up.
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