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    Attempting to map option rom on dev 01:01.0
    Option rom sizing returned fc000001 fffe0000
    Inspecting possible rom at 0xfc000000 (dv=3D515e1002 bdf=3D108)
    No option rom signature (got 7373)

This looks like the right device, so I don't know why the signature isn't
valid.  You could try reading the ROM in Linux and seeing if you don't get =
a
valid signature.  You could put the ROM into CBFS with a valid signature an=
d
try again.  Some extra debugging output might help here.  I guess you could
ignore the signature too, just to see.

is this the
> highest one? because 7 and 8 made compilation fail.
>
That's not good.  You could send the log of the failing build to the list,
or play around to see what component is having trouble.

Thanks,
Myles

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<br><br><div class=3D"gmail_quote">On Mon, Dec 28, 2009 at 3:26 AM, Knut Ku=
jat <span dir=3D"ltr"><<a href=3D"mailto:knuku at gap.upv.es">knuku at gap.upv=
.es</a>></span> wrote:<br><blockquote class=3D"gmail_quote" style=3D"bor=
der-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-=
left: 1ex;">
Myles Watson escribi=F3:<br>
<div class=3D"im">>>> Scan for VGA option rom<br>
>>> Got ps2 nak (status=3D51); continuing<br>
>>> ps2_recvbyte timeout<br>
>>><br>
>>> I can't see your VGA ROM getting run anywhere. =A0Did I ju=
st miss it?<br>
>>><br>
>> Nop, not working anywhere seems like Seabios doesn't find any =
vga rom.<br>
>><br>
> You could try a more verbose setting for SeaBIOS and send the output t=
o<br>
> Kevin. =A0I'm surprised it doesn't just work.<br>
><br>
><br>
>> So I tried setting up CONFIG_SB_HT_CHAIN_ON_BUS0 to different valu=
es, no<br>
>> luck!<br>
>><br>
> Yeah. =A0It doesn't seem like an enumeration problem. =A0The devic=
e tree seems<br>
> like it's getting set up pretty well.<br>
><br>
><br>
>>> You could try having Coreboot run it with vm86 and with<br>
>>> CONFIG_CONSOLE_VGA set to see if that works. =A0I'm wonder=
ing why<br>
>>> SeaBIOS isn't finding it.<br>
>>><br>
>>><br>
>> CONFIG_CONSOLE_VGA was already set to 1. How do I run coreboot wit=
h vm86?<br>
>><br>
> CONFIG_VGA_ROM_RUN =3D1<br>
> In Kconfig there's a VM86 option, but I don't see it in newcon=
fig.<br>
><br>
><br>
>> At least now at linux boot up my NICs are found but trying to init=
ialize<br>
>> they got to a "Unable to allocate interrupt" :( I attach=
 my latest log.<br>
>><br>
> Did you change the mptable and irqtables to match the factory assignme=
nts?<br>
><br>
</div>I thought they got set up by code and I don't have to touch anyth=
ing. Am<br>
I wrong? If so what and where do I have to do changes since mptable.c<br>
and irq_table.c is all code.<br></blockquote><div>=A0<br>in mptable.c:<br><=
br></div><div>=A0=A0=A0 =A0=A0=A0 dev =3D dev_find_slot(m->bus_mcp55[0],=
 PCI_DEVFN(sbdn+ 0x1,0));<br>=A0=A0 =A0=A0=A0 =A0if (dev) {<br>=A0=A0 =A0=
=A0=A0 =A0=A0=A0 =A0res =3D find_resource(dev, PCI_BASE_ADDRESS_1);<br>
=A0=A0 =A0=A0=A0 =A0=A0=A0 =A0if (res) {<br>=A0=A0 =A0=A0=A0 =A0=A0=A0 =A0=
=A0=A0 =A0smp_write_ioapic(mc, m->apicid_mcp55, 0x11, res->base);<br>=
=A0=A0 =A0=A0=A0 =A0=A0=A0 =A0}<br><br>/* These three values are interrupt =
routing values. */<br>=A0=A0 =A0=A0=A0 =A0=A0=A0 =A0dword =3D 0x43c6c643;<b=
r>
=A0=A0 =A0=A0=A0 =A0=A0=A0=A0 pci_write_config32(dev, 0x7c, dword);<br><br>=
=A0=A0 =A0=A0=A0 =A0=A0=A0 =A0dword =3D 0x81001a00;<br>=A0=A0 =A0=A0=A0 =A0=
=A0=A0 =A0pci_write_config32(dev, 0x80, dword);<br><br>=A0=A0 =A0=A0=A0 =A0=
=A0=A0 =A0dword =3D 0xd00012d2;<br>=A0=A0 =A0=A0=A0 =A0=A0=A0 =A0pci_write_=
config32(dev, 0x84, dword);<br>
<br>=A0=A0 =A0=A0=A0 =A0}<br><br>Unfortunately, it's undocumented, so y=
ou have a couple of options:<br>1. Look at <a href=3D"http://www.coreboot.o=
rg/Nvidia_MCP55_Porting_Notes">http://www.coreboot.org/Nvidia_MCP55_Porting=
_Notes</a><br>
2. Decode the ACPI interrrupt assignments<br><br>Either way you may need to=
 look at the interrupt assignments in Linux when booted with the factory BI=
OS.<br><br></div><blockquote class=3D"gmail_quote" style=3D"border-left: 1p=
x solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">

I attached a log with seabios set up on debug level 6, </blockquote><div><b=
r>That was high enough.=A0 You can also change the debugging level of any c=
omponent in config.h <br></div><div><br>From your log:<br><br>=A0=A0=A0 Att=
empting to map option rom on dev 01:01.0<br>
=A0=A0=A0
Option rom sizing returned fc000001 fffe0000<br>=A0=A0=A0
Inspecting possible rom at 0xfc000000 (dv=3D515e1002 bdf=3D108)<br>=A0=A0=
=A0
No option rom signature (got 7373)<br><br>This looks like the right device,=
 so I don't know why the signature isn't valid.=A0 You could try re=
ading the ROM in Linux and seeing if you don't get a valid signature.=
=A0 You could put the ROM into CBFS with a valid signature and try again.=
=A0 Some extra debugging output might help here.=A0 I guess you could ignor=
e the signature too, just to see.<br>
<br>
</div><blockquote class=3D"gmail_quote" style=3D"border-left: 1px solid rgb=
(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">is this the=
<br>
highest one? because 7 and 8 made compilation fail.<font color=3D"#888888">=
<br></font></blockquote><div>That's not good.=A0 You could send the log=
 of the failing build to the list, or play around to see what component is =
having trouble.<br>
<br>Thanks,<br>Myles<br></div></div><br>

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