[coreboot] New patch to review for coreboot: 8d8beab Remove asm/ directory
Ronald G. Minnich (rminnich@gmail.com)
gerrit at coreboot.org
Fri Dec 7 19:46:08 CET 2012
Ronald G. Minnich (rminnich at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1988
-gerrit
commit 8d8beabab1a4e9277dca778d880afc07666ee23b
Author: Ronald G. Minnich <rminnich at gmail.com>
Date: Fri Dec 7 10:42:21 2012 -0800
Remove asm/ directory
These functions will be done elsewhere. This is not Linux.
Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
Change-Id: I3cbeb7997cba5fb6106a2a4b1205ea7c09c57cef
---
src/arch/armv7/include/asm/bitops.h | 316 -------------------------------
src/arch/armv7/include/asm/bitsperlong.h | 28 ---
src/arch/armv7/include/asm/irqflags.h | 155 ---------------
src/arch/armv7/include/asm/memory.h | 300 -----------------------------
src/arch/armv7/include/asm/posix_types.h | 77 --------
src/arch/armv7/include/asm/system.h | 62 ------
src/arch/armv7/include/asm/types.h | 16 --
7 files changed, 954 deletions(-)
diff --git a/src/arch/armv7/include/asm/bitops.h b/src/arch/armv7/include/asm/bitops.h
deleted file mode 100644
index 1c961dd..0000000
--- a/src/arch/armv7/include/asm/bitops.h
+++ /dev/null
@@ -1,316 +0,0 @@
-/*
- * Copyright 1995, Russell King.
- * Various bits and pieces copyrights include:
- * Linus Torvalds (test_bit).
- * Big endian support: Copyright 2001, Nicolas Pitre
- * reworked by rmk.
- *
- * bit 0 is the LSB of an "unsigned long" quantity.
- *
- * Please note that the code in this file should never be included
- * from user space. Many of these are not implemented in assembler
- * since they would be too costly. Also, they require privileged
- * instructions (which are not available from user mode) to ensure
- * that they are atomic.
- */
-
-#ifndef __ASM_ARM_BITOPS_H
-#define __ASM_ARM_BITOPS_H
-
-#ifdef __KERNEL__
-
-#ifndef _LINUX_BITOPS_H
-#error only <linux/bitops.h> can be included directly
-#endif
-
-#include <linux/irqflags.h>
-
-#define smp_mb__before_clear_bit() smp_mb()
-#define smp_mb__after_clear_bit() smp_mb()
-
-/*
- * These functions are the basis of our bit ops.
- *
- * First, the atomic bitops. These use native endian.
- */
-static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- raw_local_irq_save(flags);
- *p |= mask;
- raw_local_irq_restore(flags);
-}
-
-static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- raw_local_irq_save(flags);
- *p &= ~mask;
- raw_local_irq_restore(flags);
-}
-
-static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- raw_local_irq_save(flags);
- *p ^= mask;
- raw_local_irq_restore(flags);
-}
-
-static inline int
-____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned int res;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- raw_local_irq_save(flags);
- res = *p;
- *p = res | mask;
- raw_local_irq_restore(flags);
-
- return (res & mask) != 0;
-}
-
-static inline int
-____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned int res;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- raw_local_irq_save(flags);
- res = *p;
- *p = res & ~mask;
- raw_local_irq_restore(flags);
-
- return (res & mask) != 0;
-}
-
-static inline int
-____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned int res;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- raw_local_irq_save(flags);
- res = *p;
- *p = res ^ mask;
- raw_local_irq_restore(flags);
-
- return (res & mask) != 0;
-}
-
-#include <asm-generic/bitops/non-atomic.h>
-
-/*
- * A note about Endian-ness.
- * -------------------------
- *
- * When the ARM is put into big endian mode via CR15, the processor
- * merely swaps the order of bytes within words, thus:
- *
- * ------------ physical data bus bits -----------
- * D31 ... D24 D23 ... D16 D15 ... D8 D7 ... D0
- * little byte 3 byte 2 byte 1 byte 0
- * big byte 0 byte 1 byte 2 byte 3
- *
- * This means that reading a 32-bit word at address 0 returns the same
- * value irrespective of the endian mode bit.
- *
- * Peripheral devices should be connected with the data bus reversed in
- * "Big Endian" mode. ARM Application Note 61 is applicable, and is
- * available from http://www.arm.com/.
- *
- * The following assumes that the data bus connectivity for big endian
- * mode has been followed.
- *
- * Note that bit 0 is defined to be 32-bit word bit 0, not byte 0 bit 0.
- */
-
-/*
- * Native endian assembly bitops. nr = 0 -> word 0 bit 0.
- */
-extern void _set_bit(int nr, volatile unsigned long * p);
-extern void _clear_bit(int nr, volatile unsigned long * p);
-extern void _change_bit(int nr, volatile unsigned long * p);
-extern int _test_and_set_bit(int nr, volatile unsigned long * p);
-extern int _test_and_clear_bit(int nr, volatile unsigned long * p);
-extern int _test_and_change_bit(int nr, volatile unsigned long * p);
-
-/*
- * Little endian assembly bitops. nr = 0 -> byte 0 bit 0.
- */
-extern int _find_first_zero_bit_le(const void * p, unsigned size);
-extern int _find_next_zero_bit_le(const void * p, int size, int offset);
-extern int _find_first_bit_le(const unsigned long *p, unsigned size);
-extern int _find_next_bit_le(const unsigned long *p, int size, int offset);
-
-/*
- * Big endian assembly bitops. nr = 0 -> byte 3 bit 0.
- */
-extern int _find_first_zero_bit_be(const void * p, unsigned size);
-extern int _find_next_zero_bit_be(const void * p, int size, int offset);
-extern int _find_first_bit_be(const unsigned long *p, unsigned size);
-extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
-
-#ifndef CONFIG_SMP
-/*
- * The __* form of bitops are non-atomic and may be reordered.
- */
-#define ATOMIC_BITOP(name,nr,p) \
- (__builtin_constant_p(nr) ? ____atomic_##name(nr, p) : _##name(nr,p))
-#else
-#define ATOMIC_BITOP(name,nr,p) _##name(nr,p)
-#endif
-
-/*
- * Native endian atomic definitions.
- */
-#define set_bit(nr,p) ATOMIC_BITOP(set_bit,nr,p)
-#define clear_bit(nr,p) ATOMIC_BITOP(clear_bit,nr,p)
-#define change_bit(nr,p) ATOMIC_BITOP(change_bit,nr,p)
-#define test_and_set_bit(nr,p) ATOMIC_BITOP(test_and_set_bit,nr,p)
-#define test_and_clear_bit(nr,p) ATOMIC_BITOP(test_and_clear_bit,nr,p)
-#define test_and_change_bit(nr,p) ATOMIC_BITOP(test_and_change_bit,nr,p)
-
-#ifndef __ARMEB__
-/*
- * These are the little endian, atomic definitions.
- */
-#define find_first_zero_bit(p,sz) _find_first_zero_bit_le(p,sz)
-#define find_next_zero_bit(p,sz,off) _find_next_zero_bit_le(p,sz,off)
-#define find_first_bit(p,sz) _find_first_bit_le(p,sz)
-#define find_next_bit(p,sz,off) _find_next_bit_le(p,sz,off)
-
-#else
-/*
- * These are the big endian, atomic definitions.
- */
-#define find_first_zero_bit(p,sz) _find_first_zero_bit_be(p,sz)
-#define find_next_zero_bit(p,sz,off) _find_next_zero_bit_be(p,sz,off)
-#define find_first_bit(p,sz) _find_first_bit_be(p,sz)
-#define find_next_bit(p,sz,off) _find_next_bit_be(p,sz,off)
-
-#endif
-
-#if __LINUX_ARM_ARCH__ < 5
-
-#include <asm-generic/bitops/ffz.h>
-#include <asm-generic/bitops/__fls.h>
-#include <asm-generic/bitops/__ffs.h>
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/ffs.h>
-
-#else
-
-static inline int constant_fls(int x)
-{
- int r = 32;
-
- if (!x)
- return 0;
- if (!(x & 0xffff0000u)) {
- x <<= 16;
- r -= 16;
- }
- if (!(x & 0xff000000u)) {
- x <<= 8;
- r -= 8;
- }
- if (!(x & 0xf0000000u)) {
- x <<= 4;
- r -= 4;
- }
- if (!(x & 0xc0000000u)) {
- x <<= 2;
- r -= 2;
- }
- if (!(x & 0x80000000u)) {
- x <<= 1;
- r -= 1;
- }
- return r;
-}
-
-/*
- * On ARMv5 and above those functions can be implemented around
- * the clz instruction for much better code efficiency.
- */
-
-static inline int fls(int x)
-{
- int ret;
-
- if (__builtin_constant_p(x))
- return constant_fls(x);
-
- asm("clz\t%0, %1" : "=r" (ret) : "r" (x));
- ret = 32 - ret;
- return ret;
-}
-
-#define __fls(x) (fls(x) - 1)
-#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
-#define __ffs(x) (ffs(x) - 1)
-#define ffz(x) __ffs( ~(x) )
-
-#endif
-
-#include <asm-generic/bitops/fls64.h>
-
-#include <asm-generic/bitops/sched.h>
-#include <asm-generic/bitops/hweight.h>
-#include <asm-generic/bitops/lock.h>
-
-#ifdef __ARMEB__
-
-static inline int find_first_zero_bit_le(const void *p, unsigned size)
-{
- return _find_first_zero_bit_le(p, size);
-}
-#define find_first_zero_bit_le find_first_zero_bit_le
-
-static inline int find_next_zero_bit_le(const void *p, int size, int offset)
-{
- return _find_next_zero_bit_le(p, size, offset);
-}
-#define find_next_zero_bit_le find_next_zero_bit_le
-
-static inline int find_next_bit_le(const void *p, int size, int offset)
-{
- return _find_next_bit_le(p, size, offset);
-}
-#define find_next_bit_le find_next_bit_le
-
-#endif
-
-#include <asm-generic/bitops/le.h>
-
-/*
- * Ext2 is defined to use little-endian byte ordering.
- */
-#include <asm-generic/bitops/ext2-atomic-setbit.h>
-
-#endif /* __KERNEL__ */
-
-#endif /* _ARM_BITOPS_H */
diff --git a/src/arch/armv7/include/asm/bitsperlong.h b/src/arch/armv7/include/asm/bitsperlong.h
deleted file mode 100644
index ef2bbb2..0000000
--- a/src/arch/armv7/include/asm/bitsperlong.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- *
- * bitsperlong.h: There is no ARM-specific version of bitsperlong.h in Linux,
- * so this just points to the generic bitsperlong.h.
- */
-
-#ifndef __ASM_ARM_BITSPERLONG_H
-#define __ASM_ARM_BITSPERLONG_H
-
-#include <asm-generic/bitsperlong.h>
-
-#endif /* __ASM_ARM_BITSPERLONG_H */
diff --git a/src/arch/armv7/include/asm/irqflags.h b/src/arch/armv7/include/asm/irqflags.h
deleted file mode 100644
index 1e6cca5..0000000
--- a/src/arch/armv7/include/asm/irqflags.h
+++ /dev/null
@@ -1,155 +0,0 @@
-#ifndef __ASM_ARM_IRQFLAGS_H
-#define __ASM_ARM_IRQFLAGS_H
-
-#ifdef __KERNEL__
-
-#include <asm/ptrace.h>
-
-/*
- * CPU interrupt mask handling.
- */
-#if __LINUX_ARM_ARCH__ >= 6
-
-static inline unsigned long arch_local_irq_save(void)
-{
- unsigned long flags;
-
- asm volatile(
- " mrs %0, cpsr @ arch_local_irq_save\n"
- " cpsid i"
- : "=r" (flags) : : "memory", "cc");
- return flags;
-}
-
-static inline void arch_local_irq_enable(void)
-{
- asm volatile(
- " cpsie i @ arch_local_irq_enable"
- :
- :
- : "memory", "cc");
-}
-
-static inline void arch_local_irq_disable(void)
-{
- asm volatile(
- " cpsid i @ arch_local_irq_disable"
- :
- :
- : "memory", "cc");
-}
-
-#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
-#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
-#else
-
-/*
- * Save the current interrupt enable state & disable IRQs
- */
-static inline unsigned long arch_local_irq_save(void)
-{
- unsigned long flags, temp;
-
- asm volatile(
- " mrs %0, cpsr @ arch_local_irq_save\n"
- " orr %1, %0, #128\n"
- " msr cpsr_c, %1"
- : "=r" (flags), "=r" (temp)
- :
- : "memory", "cc");
- return flags;
-}
-
-/*
- * Enable IRQs
- */
-static inline void arch_local_irq_enable(void)
-{
- unsigned long temp;
- asm volatile(
- " mrs %0, cpsr @ arch_local_irq_enable\n"
- " bic %0, %0, #128\n"
- " msr cpsr_c, %0"
- : "=r" (temp)
- :
- : "memory", "cc");
-}
-
-/*
- * Disable IRQs
- */
-static inline void arch_local_irq_disable(void)
-{
- unsigned long temp;
- asm volatile(
- " mrs %0, cpsr @ arch_local_irq_disable\n"
- " orr %0, %0, #128\n"
- " msr cpsr_c, %0"
- : "=r" (temp)
- :
- : "memory", "cc");
-}
-
-/*
- * Enable FIQs
- */
-#define local_fiq_enable() \
- ({ \
- unsigned long temp; \
- __asm__ __volatile__( \
- "mrs %0, cpsr @ stf\n" \
-" bic %0, %0, #64\n" \
-" msr cpsr_c, %0" \
- : "=r" (temp) \
- : \
- : "memory", "cc"); \
- })
-
-/*
- * Disable FIQs
- */
-#define local_fiq_disable() \
- ({ \
- unsigned long temp; \
- __asm__ __volatile__( \
- "mrs %0, cpsr @ clf\n" \
-" orr %0, %0, #64\n" \
-" msr cpsr_c, %0" \
- : "=r" (temp) \
- : \
- : "memory", "cc"); \
- })
-
-#endif
-
-/*
- * Save the current interrupt enable state.
- */
-static inline unsigned long arch_local_save_flags(void)
-{
- unsigned long flags;
- asm volatile(
- " mrs %0, cpsr @ local_save_flags"
- : "=r" (flags) : : "memory", "cc");
- return flags;
-}
-
-/*
- * restore saved IRQ & FIQ state
- */
-static inline void arch_local_irq_restore(unsigned long flags)
-{
- asm volatile(
- " msr cpsr_c, %0 @ local_irq_restore"
- :
- : "r" (flags)
- : "memory", "cc");
-}
-
-static inline int arch_irqs_disabled_flags(unsigned long flags)
-{
- return flags & PSR_I_BIT;
-}
-
-#endif
-#endif
diff --git a/src/arch/armv7/include/asm/memory.h b/src/arch/armv7/include/asm/memory.h
deleted file mode 100644
index c7cc9e7..0000000
--- a/src/arch/armv7/include/asm/memory.h
+++ /dev/null
@@ -1,300 +0,0 @@
-/*
- * arch/arm/include/asm/memory.h
- *
- * Copyright (C) 2000-2002 Russell King
- * modification for nommu, Hyok S. Choi, 2004
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Note: this file should not be included by non-asm/.h files
- */
-#ifndef __ASM_ARM_MEMORY_H
-#define __ASM_ARM_MEMORY_H
-
-//#include <linux/const.h>
-#include <types.h>
-#include <arch/types.h>
-//typedef uintptr_t phys_addr_t;
-//#include <linux/sizes.h>
-
-#ifdef CONFIG_NEED_MACH_MEMORY_H
-#include <mach/memory.h>
-#endif
-
-/* FIXME(dhendrix): U-Boot <--> Linux #defines */
-#ifdef CONFIG_SYS_SDRAM_BASE
-#define CONFIG_DRAM_BASE CONFIG_SYS_SDRAM_BASE
-#endif
-#ifdef CONFIG_DRAM_SIZE_MB
-#define CONFIG_DRAM_SIZE (CONFIG_DRAM_BASE * 1024)
-#endif
-
-/*
- * Allow for constants defined here to be used from assembly code
- * by prepending the UL suffix only with actual C code compilation.
- */
-#ifdef __ASSEMBLY__
-#define _AC(X,Y) X
-#else
-#define __AC(X,Y) (X##Y)
-#define _AC(X,Y) __AC(X,Y)
-#endif
-
-#define UL(x) _AC(x, UL)
-
-#ifdef CONFIG_MMU
-
-/*
- * PAGE_OFFSET - the virtual address of the start of the kernel image
- * TASK_SIZE - the maximum size of a user space task.
- * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area
- */
-#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
-#define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(0x01000000))
-#define TASK_UNMAPPED_BASE (UL(CONFIG_PAGE_OFFSET) / 3)
-
-/*
- * The maximum size of a 26-bit user space task.
- */
-#define TASK_SIZE_26 UL(0x04000000)
-
-/*
- * The module space lives between the addresses given by TASK_SIZE
- * and PAGE_OFFSET - it must be within 32MB of the kernel text.
- */
-#ifndef CONFIG_THUMB2_KERNEL
-#define MODULES_VADDR (PAGE_OFFSET - 16*1024*1024)
-#else
-/* smaller range for Thumb-2 symbols relocation (2^24)*/
-#define MODULES_VADDR (PAGE_OFFSET - 8*1024*1024)
-#endif
-
-#if TASK_SIZE > MODULES_VADDR
-#error Top of user space clashes with start of module space
-#endif
-
-/*
- * The highmem pkmap virtual space shares the end of the module area.
- */
-#ifdef CONFIG_HIGHMEM
-#define MODULES_END (PAGE_OFFSET - PMD_SIZE)
-#else
-#define MODULES_END (PAGE_OFFSET)
-#endif
-
-/*
- * The XIP kernel gets mapped at the bottom of the module vm area.
- * Since we use sections to map it, this macro replaces the physical address
- * with its virtual address while keeping offset from the base section.
- */
-#define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff))
-
-/*
- * Allow 16MB-aligned ioremap pages
- */
-#define IOREMAP_MAX_ORDER 24
-
-#define CONSISTENT_END (0xffe00000UL)
-
-#else /* CONFIG_MMU */
-
-/*
- * The limitation of user task size can grow up to the end of free ram region.
- * It is difficult to define and perhaps will never meet the original meaning
- * of this define that was meant to.
- * Fortunately, there is no reference for this in noMMU mode, for now.
- */
-#ifndef TASK_SIZE
-#define TASK_SIZE (CONFIG_DRAM_SIZE)
-#endif
-
-#ifndef TASK_UNMAPPED_BASE
-#define TASK_UNMAPPED_BASE UL(0x00000000)
-#endif
-
-#ifndef PHYS_OFFSET
-#define PHYS_OFFSET UL(CONFIG_DRAM_BASE)
-#endif
-
-#ifndef END_MEM
-#define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE)
-#endif
-
-#ifndef PAGE_OFFSET
-#define PAGE_OFFSET (PHYS_OFFSET)
-#endif
-
-/*
- * The module can be at any place in ram in nommu mode.
- */
-#define MODULES_END (END_MEM)
-#define MODULES_VADDR (PHYS_OFFSET)
-
-#define XIP_VIRT_ADDR(physaddr) (physaddr)
-
-#endif /* !CONFIG_MMU */
-
-/*
- * We fix the TCM memories max 32 KiB ITCM resp DTCM at these
- * locations
- */
-#ifdef CONFIG_HAVE_TCM
-#define ITCM_OFFSET UL(0xfffe0000)
-#define DTCM_OFFSET UL(0xfffe8000)
-#endif
-
-/*
- * Convert a physical address to a Page Frame Number and back
- */
-#define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT))
-#define __pfn_to_phys(pfn) ((phys_addr_t)(pfn) << PAGE_SHIFT)
-
-/*
- * Convert a page to/from a physical address
- */
-#define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page)))
-#define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys)))
-
-#ifndef __ASSEMBLY__
-
-/*
- * Physical vs virtual RAM address space conversion. These are
- * private definitions which should NOT be used outside memory.h
- * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
- */
-#ifndef __virt_to_phys
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
-
-/*
- * Constants used to force the right instruction encodings and shifts
- * so that all we need to do is modify the 8-bit constant field.
- */
-#define __PV_BITS_31_24 0x81000000
-
-extern unsigned long __pv_phys_offset;
-#define PHYS_OFFSET __pv_phys_offset
-
-#define __pv_stub(from,to,instr,type) \
- __asm__("@ __pv_stub\n" \
- "1: " instr " %0, %1, %2\n" \
- " .pushsection .pv_table,\"a\"\n" \
- " .long 1b\n" \
- " .popsection\n" \
- : "=r" (to) \
- : "r" (from), "I" (type))
-
-static inline unsigned long __virt_to_phys(unsigned long x)
-{
- unsigned long t;
- __pv_stub(x, t, "add", __PV_BITS_31_24);
- return t;
-}
-
-static inline unsigned long __phys_to_virt(unsigned long x)
-{
- unsigned long t;
- __pv_stub(x, t, "sub", __PV_BITS_31_24);
- return t;
-}
-#else
-#define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
-#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
-#endif
-#endif
-#endif /* __ASSEMBLY__ */
-
-#ifndef PHYS_OFFSET
-#ifdef PLAT_PHYS_OFFSET
-#define PHYS_OFFSET PLAT_PHYS_OFFSET
-#else
-#define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)
-#endif
-#endif
-
-#ifndef __ASSEMBLY__
-
-/*
- * PFNs are used to describe any physical page; this means
- * PFN 0 == physical address 0.
- *
- * This is the PFN of the first RAM page in the kernel
- * direct-mapped view. We assume this is the first page
- * of RAM in the mem_map as well.
- */
-#define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
-
-
-/*
- * These are *only* valid on the kernel direct mapped RAM memory.
- * Note: Drivers should NOT use these. They are the wrong
- * translation for translating DMA addresses. Use the driver
- * DMA support - see dma-mapping.h.
- */
-static inline phys_addr_t virt_to_phys(const volatile void *x)
-{
- return __virt_to_phys((unsigned long)(x));
-}
-
-static inline void *phys_to_virt(phys_addr_t x)
-{
- return (void *)(__phys_to_virt((unsigned long)(x)));
-}
-
-/*
- * Drivers should NOT use these either.
- */
-#define __pa(x) __virt_to_phys((unsigned long)(x))
-#define __va(x) ((void *)__phys_to_virt((unsigned long)(x)))
-#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
-
-/*
- * Virtual <-> DMA view memory address translations
- * Again, these are *only* valid on the kernel direct mapped RAM
- * memory. Use of these is *deprecated* (and that doesn't mean
- * use the __ prefixed forms instead.) See dma-mapping.h.
- */
-#ifndef __virt_to_bus
-#define __virt_to_bus __virt_to_phys
-#define __bus_to_virt __phys_to_virt
-#define __pfn_to_bus(x) __pfn_to_phys(x)
-#define __bus_to_pfn(x) __phys_to_pfn(x)
-#endif
-
-#define __deprecated
-static inline __deprecated unsigned long virt_to_bus(void *x)
-{
- return __virt_to_bus((unsigned long)x);
-}
-
-static inline __deprecated void *bus_to_virt(unsigned long x)
-{
- return (void *)__bus_to_virt(x);
-}
-
-/*
- * Conversion between a struct page and a physical address.
- *
- * Note: when converting an unknown physical address to a
- * struct page, the resulting pointer must be validated
- * using VALID_PAGE(). It must return an invalid struct page
- * for any physical address not corresponding to a system
- * RAM address.
- *
- * page_to_pfn(page) convert a struct page * to a PFN number
- * pfn_to_page(pfn) convert a _valid_ PFN number to struct page *
- *
- * virt_to_page(k) convert a _valid_ virtual address to struct page *
- * virt_addr_valid(k) indicates whether a virtual address is valid
- */
-#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET
-
-#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
-#define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
-
-#endif
-
-//#include <asm-generic/memory_model.h>
-
-#endif
diff --git a/src/arch/armv7/include/asm/posix_types.h b/src/arch/armv7/include/asm/posix_types.h
deleted file mode 100644
index 2446d23..0000000
--- a/src/arch/armv7/include/asm/posix_types.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * arch/arm/include/asm/posix_types.h
- *
- * Copyright (C) 1996-1998 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 27-06-1996 RMK Created
- */
-#ifndef __ARCH_ARM_POSIX_TYPES_H
-#define __ARCH_ARM_POSIX_TYPES_H
-
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc. Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned long __kernel_ino_t;
-typedef unsigned short __kernel_mode_t;
-typedef unsigned short __kernel_nlink_t;
-typedef long __kernel_off_t;
-typedef int __kernel_pid_t;
-typedef unsigned short __kernel_ipc_pid_t;
-typedef unsigned short __kernel_uid_t;
-typedef unsigned short __kernel_gid_t;
-typedef unsigned int __kernel_size_t;
-typedef int __kernel_ssize_t;
-typedef int __kernel_ptrdiff_t;
-typedef long __kernel_time_t;
-typedef long __kernel_suseconds_t;
-typedef long __kernel_clock_t;
-typedef int __kernel_timer_t;
-typedef int __kernel_clockid_t;
-typedef int __kernel_daddr_t;
-typedef char * __kernel_caddr_t;
-typedef unsigned short __kernel_uid16_t;
-typedef unsigned short __kernel_gid16_t;
-typedef unsigned int __kernel_uid32_t;
-typedef unsigned int __kernel_gid32_t;
-
-typedef unsigned short __kernel_old_uid_t;
-typedef unsigned short __kernel_old_gid_t;
-typedef unsigned short __kernel_old_dev_t;
-
-#ifdef __GNUC__
-typedef long long __kernel_loff_t;
-#endif
-
-typedef struct {
- int val[2];
-} __kernel_fsid_t;
-
-#if defined(__KERNEL__)
-
-#undef __FD_SET
-#define __FD_SET(fd, fdsetp) \
- (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] |= (1<<((fd) & 31)))
-
-#undef __FD_CLR
-#define __FD_CLR(fd, fdsetp) \
- (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] &= ~(1<<((fd) & 31)))
-
-#undef __FD_ISSET
-#define __FD_ISSET(fd, fdsetp) \
- ((((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] & (1<<((fd) & 31))) != 0)
-
-#undef __FD_ZERO
-#define __FD_ZERO(fdsetp) \
- (memset (fdsetp, 0, sizeof (*(fd_set *)(fdsetp))))
-
-#endif
-
-#endif
diff --git a/src/arch/armv7/include/asm/system.h b/src/arch/armv7/include/asm/system.h
deleted file mode 100644
index a061f8b..0000000
--- a/src/arch/armv7/include/asm/system.h
+++ /dev/null
@@ -1,62 +0,0 @@
-#ifndef __ASM_ARM_SYSTEM_H
-#define __ASM_ARM_SYSTEM_H
-
-#define CPU_ARCH_UNKNOWN 0
-#define CPU_ARCH_ARMv3 1
-#define CPU_ARCH_ARMv4 2
-#define CPU_ARCH_ARMv4T 3
-#define CPU_ARCH_ARMv5 4
-#define CPU_ARCH_ARMv5T 5
-#define CPU_ARCH_ARMv5TE 6
-#define CPU_ARCH_ARMv5TEJ 7
-#define CPU_ARCH_ARMv6 8
-#define CPU_ARCH_ARMv7 9
-
-/*
- * CR1 bits (CP#15 CR1)
- */
-#define CR_M (1 << 0) /* MMU enable */
-#define CR_A (1 << 1) /* Alignment abort enable */
-#define CR_C (1 << 2) /* Dcache enable */
-#define CR_W (1 << 3) /* Write buffer enable */
-#define CR_P (1 << 4) /* 32-bit exception handler */
-#define CR_D (1 << 5) /* 32-bit data address range */
-#define CR_L (1 << 6) /* Implementation defined */
-#define CR_B (1 << 7) /* Big endian */
-#define CR_S (1 << 8) /* System MMU protection */
-#define CR_R (1 << 9) /* ROM MMU protection */
-#define CR_F (1 << 10) /* Implementation defined */
-#define CR_Z (1 << 11) /* Implementation defined */
-#define CR_I (1 << 12) /* Icache enable */
-#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
-#define CR_RR (1 << 14) /* Round Robin cache replacement */
-#define CR_L4 (1 << 15) /* LDR pc can set T bit */
-#define CR_DT (1 << 16)
-#define CR_IT (1 << 18)
-#define CR_ST (1 << 19)
-#define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */
-#define CR_U (1 << 22) /* Unaligned access operation */
-#define CR_XP (1 << 23) /* Extended page tables */
-#define CR_VE (1 << 24) /* Vectored interrupts */
-#define CR_EE (1 << 25) /* Exception (Big) Endian */
-#define CR_TRE (1 << 28) /* TEX remap enable */
-#define CR_AFE (1 << 29) /* Access flag enable */
-#define CR_TE (1 << 30) /* Thumb exception enable */
-
-/*
- * This is used to ensure the compiler did actually allocate the register we
- * asked it for some inline assembly sequences. Apparently we can't trust
- * the compiler from one version to another so a bit of paranoia won't hurt.
- * This string is meant to be concatenated with the inline asm string and
- * will cause compilation to stop on mismatch.
- * (for details, see gcc PR 15089)
- */
-#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
-
-#define isb() __asm__ __volatile__ ("" : : : "memory")
-
-#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
-
-#define arch_align_stack(x) (x)
-
-#endif
diff --git a/src/arch/armv7/include/asm/types.h b/src/arch/armv7/include/asm/types.h
deleted file mode 100644
index 28beab9..0000000
--- a/src/arch/armv7/include/asm/types.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef __ASM_ARM_TYPES_H
-#define __ASM_ARM_TYPES_H
-
-#include <asm-generic/int-ll64.h>
-
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-#ifdef __KERNEL__
-
-#define BITS_PER_LONG 32
-
-#endif /* __KERNEL__ */
-
-#endif
-
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