[coreboot] Patch set updated for coreboot: 282fc27 Supermicro H8QGI: fix IO-APICs number from 3 to 2 in buildOpts.c
Aladyshev Konstantin (kostr@list.ru)
gerrit at coreboot.org
Wed Dec 19 17:54:15 CET 2012
Aladyshev Konstantin (kostr at list.ru) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2048
-gerrit
commit 282fc275ca18325ff53dea45e51ed6efdaf95b28
Author: Aladyshev Konstantin <aladyshev at nicevt.ru>
Date: Tue Dec 18 23:43:21 2012 +0400
Supermicro H8QGI: fix IO-APICs number from 3 to 2 in buildOpts.c
H8QGI board have 2 IO-APICS with 56 irq's:
IOAPIC[0]: GSI 0-23 - SB700 southbridge
IOAPIC[1]: GSI 24-55 - RD890 northbridge
Change-Id: If2e21c0384ea0cb3d38bc84cea5829a2577d68e3
Signed-off-by: Aladyshev Konstantin <aladyshev at nicevt.ru>
---
src/mainboard/supermicro/h8qgi/buildOpts.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/supermicro/h8qgi/buildOpts.c b/src/mainboard/supermicro/h8qgi/buildOpts.c
index d73e8ad..e222c27 100644
--- a/src/mainboard/supermicro/h8qgi/buildOpts.c
+++ b/src/mainboard/supermicro/h8qgi/buildOpts.c
@@ -87,7 +87,7 @@
#define BLDCFG_VRM_CURRENT_LIMIT 120000
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 0
#define BLDCFG_VRM_INRUSH_CURRENT_LIMIT 0
-#define BLDCFG_PLAT_NUM_IO_APICS 3
+#define BLDCFG_PLAT_NUM_IO_APICS 2
#define BLDCFG_CORE_LEVELING_MODE CORE_LEVEL_LOWEST
#define BLDCFG_MEM_INIT_PSTATE 0
#define BLDCFG_AMD_PSTATE_CAP_VALUE 0
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