[coreboot] How to port core boot

Sven Schnelle svens at stackframe.org
Tue Feb 7 16:42:17 CET 2012

On 02/07/2012 04:21 PM, ali hagigat wrote:

> This time i do ram_check between 1M to 3M, here is the serial port output:
> coreboot-4.0-1959-g950f20a-dirty Tue Feb  7 18:39:18 IRST 2012 starting...
> Testing DRAM : 00100000 - 00900000
> DRAM fill: 0x00100000-0x00900000
> 00900000
> DRAM filled
> DRAM verify: 0x00100000-0x00900000
> 00900000
> DRAM range verified.
> Done.
> Loading image.
> Searching for fallback/coreboot_ram
> Check fallback/romstage
> Check fallback/coreboot_ram
> Stage: loading fallback/coreboot_ram @ 0x100000 (180224 bytes), entry @ 0x100000
> Stage: done loading.
> Jumping to image.
> I only changed sdram_enable() and some commented function calls and
> there is no payload.  How these changes can effect Coreboot?
> My guess is that the problem occurs inside this function:
> cbfs_and_run_core
> It is located in:
> ~/bios/coreboot/src/arch/x86/lib/cbfs_and_run.c
> When it wants to do a jump inside cbfs_and_run_core(), the processor
> halts some how.

I'd bet your RAM setup isn't working. In almost all cases i have seen 
coreboot hanging it was caused by non working RAM. You should test all
available RAM, not only parts of it. And that ram_check() succeeds, 
doesn't mean that your RAM setup is working properly. It just means that
nothing obvious is wrong.


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