[coreboot] [SerialICE] Which MSR disables hyperthreading (all non-BSP/AP cores)?

Stefan Reinauer stefan.reinauer at coreboot.org
Wed Feb 15 18:05:26 CET 2012

* Idwer Vollering <vidwer at gmail.com> [120215 17:33]:
> Or: how to start a multicore (hyperthreading) processor as if it were
> a singlecore (non-hyperthreading) processor.
> Would it be necessary to configure APIC/IPI in serialice' mainboard
> specific code?

You probably need something like:

        /* Send INIT IPI to all excluding ourself. */
        movl    $0x000C4500, %eax
        movl    $0xFEE00300, %esi
        movl    %eax, (%esi)

(Taken from cache_as_ram.inc on model_6ex)


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