[coreboot] Is save and restore of BIST required?

Kyösti Mälkki kyosti.malkki at gmail.com
Mon Jan 23 08:05:22 CET 2012

On Sun, 2012-01-22 at 22:25 +0530, Vikram Narayanan wrote:
> Hi,
> In file src/cpu/x86/fpu_enable.inc and also in some other places, BIST 
> value is saved and restored after touching the eax register.
> Instead can't we use another register than using eax?
> Or it is there for historical reasons?

Well EAX is where CPU stores the BIST result initially after power-on,
and I think it is wise to use an always existing, instead of a cpu-model
specific, register here. There might be historical reasons too, like
calling ROMCC -compiled romstage and passing BIST as the first argument
to main(). 

However, I argue that implementation and usage of report_bist_failure()
is not perfect. I think it is too late in the boot process (may require
cache, APICs, HyperTransport) and if I remember correct, there is no
common POST_CODE reserved for BIST cases. BIST on SMP systems is
probably unexamined. Fail or not to fail on boot?

As a side not on early boot: I would have suggested moving
report_bist_failure() with initialisation of serial console to
bootblock. However the way tiny bootblock code is currently selected for
build becomes even uglier if more mainboard -specific code is added.

My suggestion for alternative bootblock compile method can be reviewed
here: http://review.coreboot.org/473

I can work further on these patches late February.


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