[coreboot] SIGILL on an ASUS A8V-E Deluxe

Michael Büchler mbuechler.3 at gmail.com
Fri Jul 6 13:10:57 CEST 2012


I'm trying to run coreboot on an ASUS A8V-E Deluxe. It stops with a
SIGILL after saying the following (tail of the log I got over serial):

POST: 0x9d
Adding CBMEM entry as no. 5
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum efdf
New low_table_end: 0x00000528
Now going to write high coreboot table at 0x3ffed000
rom_table_end = 0x3ffed000
Adjust low_table_end from 0x00000528 to 0x00001000 
Adjust rom_table_end from 0x3ffed000 to 0x3fff0000

I don't know much about programming but I ran gdb to take a look:

(gdb) target remote /dev/ttyS0
Remote debugging using /dev/ttyS0
unpack_lb64 (value=...) at src/include/boot/coreboot_tables.h:54
54		result = value.hi;
(gdb) info program
Debugging a target over a serial line.
Program stopped at 0x1127be.
It stopped with signal SIGILL, Illegal instruction.
(gdb) x/i $pc
=> 0x1127be <lb_cleanup_memory_ranges+79>:	movd   0xc(%eax),%xmm0
(gdb) bt full
#0  unpack_lb64 (value=...) at src/include/boot/coreboot_tables.h:54
        result = <optimized out>
#1  lb_cleanup_memory_ranges (mem=0x3ffed018) at
        entry_start = 4967675138670599
        entries = 2
        i = 0
        j = <optimized out>
#2  0x0011306b in build_lb_mem (head=0x3ffed000) at
No locals.
#3  write_coreboot_table (low_table_start=0, low_table_end=<optimized
out>, rom_table_start=1073610752, rom_table_end=<optimized out>) at
        head = 0x3ffed000
        mem = 0x3ffed018
#4  0x00104c51 in write_tables () at src/arch/x86/boot/tables.c:214
        new_high_table_pointer = <optimized out>
        rom_table_end = 984143
        high_table_pointer = 1073664000
        __func__ = "write_tables"
#5  0x00105623 in hardwaremain (boot_complete=0) at
        lb_mem = <optimized out>
#6  0x00100099 in _text () at src/arch/x86/lib/c_start.S:82
No locals.

Does this say that 'movd   0xc(%eax),%xmm0' is an Illegal Instruction?
"Google says" it's an MMX instruction, but how can that be a problem
when my Athlon64 3500+ is definitely MMX capable? Does MMX have to be
initialized which probably didn't happen?

I would try to compile coreboot without MMX but I don't know how.
Disabling CONFIG_MMX has no effect on the coreboot code, right?

Thanks is advance for any help on this. I just hope it's not an issue
because of a stupid mistake by me ;) It's the first time I try to use

More information about the coreboot mailing list