[coreboot] New patch to review for coreboot: fd2d352 Config changes to support microcode in CBFS

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Tue Jul 24 00:11:33 CEST 2012

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1292


commit fd2d35281ebb6d59d06fcd53a19f7e7d325dd5a3
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Tue Jun 19 04:20:20 2012 +0000

    Config changes to support microcode in CBFS
    Nothing is yet enabled, this is just a config skeleton change.
    The MICROCODE_INCLUDE_PATH definition is going to be used by the
    Makefile building the microcode blob for CBFS inclusion.
    Change-Id: I7868db3cfd4b181500e361706e5f4dc08ca1c87d
    Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
 src/cpu/Kconfig                   |    9 +++++++++
 src/cpu/intel/model_206ax/Kconfig |    6 ++++++
 2 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index 85e83d4..5196e1a 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -61,4 +61,13 @@ config SSE2
 	  streaming SIMD instructions. Some parts of coreboot can be built
 	  with more efficient code if SSE2 instructions are available.
+	bool "Look for microcode in CBFS"
+	help
+	  Load microcode updates from CBFS instead of compiling them in.
 endif # ARCH_X86
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig
index 6c70993..1d4ff02 100644
--- a/src/cpu/intel/model_206ax/Kconfig
+++ b/src/cpu/intel/model_206ax/Kconfig
@@ -21,6 +21,12 @@ config SMM_TSEG_SIZE
 	default 0x800000
+	string
+	default "src/cpu/intel/model_206ax"

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