[coreboot] New patch to review for coreboot: e6f8608 RTC: Enable extended CMOS in the bootblock

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Tue Jul 24 00:12:34 CEST 2012

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1306


commit e6f8608ce93f8b923a65ff2378174c3587b1236e
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Sat Jun 23 15:43:41 2012 -0700

    RTC: Enable extended CMOS in the bootblock
    This makes it available early in romstage without having to
    worry when the different romstagse enable it.
    Check for extended CMOS to be enabled in early romstage.
    This is used by a later commit which uses the extended
    CMOS region for stoage.
    Change-Id: I9e026d48499c63d6503c2b020d4cc3047126fa93
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
 src/southbridge/intel/bd82x6x/bootblock.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c
index d6cba5f..0191bbf 100644
--- a/src/southbridge/intel/bd82x6x/bootblock.c
+++ b/src/southbridge/intel/bd82x6x/bootblock.c
@@ -72,4 +72,7 @@ static void bootblock_southbridge_init(void)
+	/* Enable upper 128bytes of CMOS */
+	RCBA32(RC) = (1 << 2);

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