[coreboot] Patch merged into coreboot/master: a9a1fc5 Properly identify ACPI C3 states in _CST table.

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit a9a1fc5987493575c759af510647836138052a26
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Wed Jun 20 14:38:53 2012 -0700

    Properly identify ACPI C3 states in _CST table.
    
    Dump and disassemble ACPI tables and look in _CST.
    
    In the last entry the state was getting set to 0:
    
    Package (0x04)
    {
      ResourceTemplate ()
      {
        Register (FFixedHW,
                  0x01,               // Bit Width
                  0x02,               // Bit Offset
                  0x0000000000000030, // Address
                  0x01,               // Access Size
                  )
      },
      0x00000000,                     // State
      0x0000005A,                     // Latency
      0x000000C8                      // Power
    }
    
    Now it is properly identifed as state 3:
    
    Package (0x04)
    {
      ResourceTemplate ()
      {
        Register (FFixedHW,
                  0x01,               // Bit Width
                  0x02,               // Bit Offset
                  0x0000000000000030, // Address
                  0x01,               // Access Size
                  )
      },
      0x00000003,                     // State
      0x0000005A,                     // Latency
      0x000000C8                      // Power
    }
    
    Change-Id: Ie0a68606c5a43ac5fb5ba7bb9a3fef933ad67b64
    Signed-off-by: Duncan Laurie <dlaurie at google.com>

Reviewed-By: Patrick Georgi <patrick at georgi-clan.de> at Tue Jul 24 08:53:50 2012, giving +2
See http://review.coreboot.org/1297 for details.

-gerrit