[coreboot] Patch merged into coreboot/master: 93f232d Fix LAPIC timer on Ivy Bridge systems

gerrit at coreboot.org gerrit at coreboot.org
Wed Jul 25 01:17:27 CEST 2012

the following patch was just integrated into master:
commit 93f232dad8f8e544153c14b6d57cb66395adb960
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Tue Jul 10 13:24:29 2012 -0700

    Fix LAPIC timer on Ivy Bridge systems
    The LAPIC timer is running at BCLK (100MHz) on Sandy Bridge and Ivy
    Bridge systems. However, the current timer code assumed that the clock
    would run at 200MHz instead. This made all delays twice as long as
    Change-Id: I41b1186daee11cfd9a25b3a9d5ebdeeb271293c7
    Signed-off-by: Stefan Reinauer <reinauer at google.com>

Reviewed-By: Patrick Georgi <patrick at georgi-clan.de> at Tue Jul 24 08:48:48 2012, giving +2
Build-Tested: build bot (Jenkins) at Tue Jul 24 23:41:21 2012, giving +1
See http://review.coreboot.org/1330 for details.


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