[coreboot] Patch merged into coreboot/master: fa4e269 CPU: Add option to set TCC activation offset

gerrit at coreboot.org gerrit at coreboot.org
Thu Jul 26 20:32:46 CEST 2012

the following patch was just integrated into master:
commit fa4e269220a4c7d1ec5b03da23420bb7fc744646
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Jul 16 12:19:00 2012 -0700

    CPU: Add option to set TCC activation offset
    The default TCC activation offset is 0, which means TCC
    activation starts at Tj_max.  For devices with limited
    cooling ability it may be desired to lower TCC activation.
    This adds an option that can be declared in the devicetree
    to set the TCC activation to a non-zero value.
    Enable tcc_offset=15 in devicetree.cb and build/boot
    the BIOS and check that the value is set in the MSR:
    > and $(shr $(rdmsr 0 0x1a2) 24) 0xf
    Change-Id: I88f6857b40fd354f70fa9d5d9c1d8ceaea6dfcd1
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>

Build-Tested: build bot (Jenkins) at Wed Jul 25 04:09:34 2012, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Thu Jul 26 20:32:44 2012, giving +2
See http://review.coreboot.org/1343 for details.


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