[coreboot] New patch to review for coreboot: 2a39261 Intel model_106cx: change CAR to HT-capable

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Tue Jul 31 23:09:37 CEST 2012

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1384


commit 2a39261e25686ae1b3c311262dcedfea754957d3
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Jul 31 23:47:09 2012 +0300

    Intel model_106cx: change CAR to HT-capable
    There are hyper-threading Atom CPUs, those would not enable L2
    cache with model_6ex CAR code. Switch to code that can handle
    different number of threads and cores.
    Change-Id: I57328c231f8998f45f7b0d26c63b24585f8476dd
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
 src/cpu/intel/model_106cx/Kconfig      |    1 +
 src/cpu/intel/model_106cx/Makefile.inc |    2 +-
 2 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig
index 103ed50..2392fae 100644
--- a/src/cpu/intel/model_106cx/Kconfig
+++ b/src/cpu/intel/model_106cx/Kconfig
@@ -3,6 +3,7 @@ config CPU_INTEL_MODEL_106CX
 	select SMP
 	select SSE2
 	select AP_IN_SIPI_WAIT
diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc
index 018febc..0b506b3 100644
--- a/src/cpu/intel/model_106cx/Makefile.inc
+++ b/src/cpu/intel/model_106cx/Makefile.inc
@@ -1,4 +1,4 @@
 driver-y += model_106cx_init.c
 subdirs-y += ../../x86/name
-cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
+cpu_incs += $(src)/cpu/intel/car/cache_as_ram_ht.inc

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