[coreboot] Patch merged into coreboot/master: 15e268e Fix ECC disable option for AMD Fam10 DDR2 and DDR3.

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 15e268ee435d7d6f8d76997336efb38c4732042e
Author: Marc Jones <marc.jones at se-eng.com>
Date:   Tue Feb 21 17:06:40 2012 -0700

    Fix ECC disable option for AMD Fam10 DDR2 and DDR3.
    
    The logic was backwards on the ECC enable/disable option. Also added better
    debug output when the debug RAM init feature is enabled.
    
    Change-Id: I60bffb6149d96cac65011247ef51cd06ed2210c6
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>

Build-Tested: build bot (Jenkins) at Wed Feb 22 02:31:23 2012, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer at coreboot.org> at Thu Mar  1 18:18:12 2012, giving +2
See http://review.coreboot.org/670 for details.

-gerrit