[coreboot] Patch set updated for coreboot: 9dc662c Fix MB calculation in the reporting of the MTRR hole

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Fri Mar 9 17:01:35 CET 2012


Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/763

-gerrit

commit 9dc662cbbc0ec16c812132958ec02eace6b23d80
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Fri Jan 6 15:49:30 2012 -0800

    Fix MB calculation in the reporting of the MTRR hole
    
    Change-Id: I34b5c4ffd2a3f3e895d2bffedce1c00ee9aea942
    Signed-off-by: Duncan Laurie <dlaurie at google.com>
---
 src/cpu/x86/mtrr/mtrr.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 8dccfef..5f5e02b 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -306,7 +306,7 @@ static unsigned int range_to_mtrr(unsigned int reg,
 
 	if (hole_sizek) {
 		printk(BIOS_DEBUG, "Adding hole at %ldMB-%ldMB\n",
-		       hole_startk, hole_startk + hole_sizek);
+		       hole_startk >> 10, (hole_startk + hole_sizek) >> 10);
 		reg = range_to_mtrr(reg, hole_startk, hole_sizek,
 			      next_range_startk, MTRR_TYPE_UNCACHEABLE,
 			      address_bits, above4gb);




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