[coreboot] [RFC] Improve very early boot

Kyösti Mälkki kyosti.malkki at gmail.com
Fri Mar 16 06:30:38 CET 2012

On Thu, 2012-03-15 at 18:41 +0100, Patrick Georgi wrote:
> Am 15.03.2012 15:00, schrieb Kyösti Mälkki:
> > One benefit of my changeset is that it can be
> > extended to move superio and console initialisation to bootblock. 
> > Serial-line IO can then be used to switch between fallback/normal
> > romstage and early POSTs could go to serial too.

> We can consider doing so (It adds complexity to something we tried to
> keep small, but I think it's worth it). But we should also aim at moving
> all chipsets to behave that way.

Okay. So I won't abandon that one, then. I'll split it once I see some
free space appear on my gerrit workspace -- a few merges there waiting
to happen. But I do understand GSoC probably takes a lot of Your
contributed time in the following few weeks.

Early debug console should be straight-forward. Pick the correct
superio/early_serial.c and PNP device number of a serial port from
devicetree.cb and enable 0x2e/0x4e and 0x3f8/0x2f8 IO ranges to LPC from
southbridge code.

> You can't do that alone (of course), but a discussion on that on the
> list (like what's going on now) goes a long way to make sure we all know
> what to expect from the change, and to enlist support in making it
> happen everywhere.

I just tend to push the changes I needed or found useful to gerrit
review without much further thought. The times I have asked questions on
the list, I often get to keep the pleasure of finding out and learning
all to myself :]


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