[coreboot] New patch to review for coreboot: 6fa3096 Whitespace fixes

Patrick Georgi (patrick@georgi-clan.de) gerrit at coreboot.org
Sat Mar 31 13:18:33 CEST 2012


Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/834

-gerrit

commit 6fa3096d7e308c9a5e1abeb5a66b662d1220366c
Author: Patrick Georgi <patrick at georgi-clan.de>
Date:   Sat Mar 31 13:08:12 2012 +0200

    Whitespace fixes
    
    Change-Id: I441326ecbda72ec7e99fc99bf40a81aa7e94ee26
    Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
---
 src/cpu/Kconfig                       |    2 +-
 src/cpu/intel/car/cache_as_ram_ht.inc |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index 0bdef34..ec10a97 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -36,7 +36,7 @@ config AP_SIPI_VECTOR
 	default 0xfffff000
 	help
 	  This must equal address of ap_sipi_vector from bootblock build.
-	  	  
+
 config	MMX
 	bool
 	help
diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc
index 0d1b2a6..32efc41 100644
--- a/src/cpu/intel/car/cache_as_ram_ht.inc
+++ b/src/cpu/intel/car/cache_as_ram_ht.inc
@@ -128,7 +128,7 @@ bsp_init:
 	jnz	1b
 
 	post_code(0x24)
-	
+
 	/* For a hyper-threading processor, cache must not be disabled
 	 * on an AP on the same physical package with the BSP.
 	 */




More information about the coreboot mailing list