[coreboot] New patch to review for coreboot: cb60b66 Don't pre-enable SATA AHCI in romstage.c
Paul Menzel
paulepanter at users.sourceforge.net
Thu May 3 08:21:54 CEST 2012
Dear Stefan,
Am Donnerstag, den 03.05.2012, 01:47 +0200 schrieb Stefan Reinauer:
> Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/995
>
> -gerrit
>
> commit cb60b660540716f4b6671e2b5d21bf75ec9c55e3
> Author: Stefan Reinauer <reinauer at chromium.org>
> Date: Wed May 2 16:39:56 2012 -0700
>
> Don't pre-enable SATA AHCI in romstage.c
>
> In a recent commit the SATA code of Panther Point / Cougar Point was
please add the exact commit ID and summary of that commit to this commit
message. I could not find it in the master branch.
If it is not committed yet, please merge this patch with the
non-committed one yet.
> changed to enable AHCI mode depending on the device tree settings rather
> than a hard code hidden in romstage.c. However, Emerald Lake 2 was not
> fixed up accordingly.
>
> Change-Id: I6c93f386509361e1ab5565b0e4d0e84f0ba282a2
> Signed-off-by: Stefan Reinauer <reinauer at google.com>
> ---
> src/mainboard/intel/emeraldlake2/romstage.c | 3 ---
> 1 files changed, 0 insertions(+), 3 deletions(-)
Thanks,
Paul
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