[coreboot] Patch set updated for coreboot: e8a76a2 Add spinlock to serialize Intel microcode updates

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Tue Nov 13 02:19:10 CET 2012

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1778


commit e8a76a2c4e624d9d65b3f684966e24b825bf9910
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Mon Oct 15 13:18:06 2012 -0700

    Add spinlock to serialize Intel microcode updates
    Updating microcode on several threads in a core at once
    can be harmful. Hence add a spinlock to make sure that
    does not happen.
    Change-Id: I0c9526b6194202ae7ab5c66361fe04ce137372cc
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
 src/cpu/intel/microcode/microcode.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index a4471ca..a525cf4 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -28,12 +28,16 @@
 #include <cpu/x86/msr.h>
 #include <cpu/intel/microcode.h>
 #ifdef __PRE_RAM__
 #include <arch/cbfs.h>
 #include <cbfs.h>
+#include <smp/spinlock.h>
 struct microcode {
@@ -111,6 +115,9 @@ void intel_update_microcode(const void *microcode_updates)
 	printk(BIOS_DEBUG, "microcode: sig=0x%x pf=0x%x revision=0x%x\n",
 			sig, pf, rev);
+#if !defined(__PRE_RAM__)
+	spin_lock(&microcode_lock);
 	m = microcode_updates;
@@ -142,6 +149,10 @@ void intel_update_microcode(const void *microcode_updates)
 			c += 2048;
+#if !defined(__ROMCC__) && !defined(__PRE_RAM__)
+	spin_unlock(&microcode_lock);

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