[coreboot] Patch merged into coreboot/master: 7bcffa5 AMD S3: Leverage the public SPI routine

gerrit at coreboot.org gerrit at coreboot.org
Fri Nov 30 20:03:32 CET 2012

the following patch was just integrated into master:
commit 7bcffa511dee2782702cc2920580d15b34073e1c
Author: Zheng Bao <fishbaozi at gmail.com>
Date:   Wed Nov 28 11:36:52 2012 +0800

    AMD S3: Leverage the public SPI routine
    Remove the old, unflexible code for storing S3 data in SPI flash.
    Refer to flashrom. Tested on Parmer.
    Change-Id: I60a10476befb4afab2b4241f01a988f4a8bb22cd
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: zbao <fishbaozi at gmail.com>
    Reviewed-on: http://review.coreboot.org/1920
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
    Reviewed-by: Marc Jones <marcj303 at gmail.com>

Build-Tested: build bot (Jenkins) at Wed Nov 28 03:15:16 2012, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer at coreboot.org> at Thu Nov 29 01:27:11 2012, giving +2
Reviewed-By: Marc Jones <marcj303 at gmail.com> at Fri Nov 30 20:03:30 2012, giving +2
See http://review.coreboot.org/1920 for details.


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