[coreboot] Patch set updated for coreboot: 5c74ba9 AMD SB800: PCIE slots on Persimmon

Zheng Bao (zheng.bao@amd.com) gerrit at coreboot.org
Wed Oct 24 04:04:04 CEST 2012


Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1098

-gerrit

commit 5c74ba9265db51902b01e58b1b471a2ee24069d5
Author: Zheng Bao <fishbaozi at gmail.com>
Date:   Wed Oct 24 11:20:44 2012 +0800

    AMD SB800: PCIE slots on Persimmon
    
    Enable the PCIE bridge which is connected to the PCIE slot.
    
    Change-Id: I1b3fb59990e06d7bc7cf19639f2b93dbb7bf9b3e
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: zbao <fishbaozi at gmail.com>
---
 src/mainboard/amd/persimmon/devicetree.cb | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb
index e5bbca2..da81dc3 100644
--- a/src/mainboard/amd/persimmon/devicetree.cb
+++ b/src/mainboard/amd/persimmon/devicetree.cb
@@ -28,12 +28,12 @@ chip northbridge/amd/agesa/family14/root_complex
 #					device pci 18.0 on #  northbridge
 					chip northbridge/amd/agesa/family14 # PCI side of HT root complex
 						device pci 0.0 on end # Root Complex
-						device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
+						device pci 1.0 on end # Internal Graphics P2P bridge 0x980[2456]
 						device pci 1.1 on end # Internal Multimedia
-						device pci 4.0 on end # PCIE P2P bridge 0x9604
-						device pci 5.0 off end # PCIE P2P bridge 0x9605
-						device pci 6.0 off end # PCIE P2P bridge 0x9606
-						device pci 7.0 off end # PCIE P2P bridge 0x9607
+						device pci 4.0 on end # PCIE P2P bridge on-board NIC
+						device pci 5.0 off end # PCIE P2P bridge
+						device pci 6.0 on end # PCIE P2P bridge PCIe slot
+						device pci 7.0 off end # PCIE P2P bridge
 						device pci 8.0 off end # NB/SB Link P2P bridge
 					end # agesa northbridge
 




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