[coreboot] New patch to review for coreboot: 6e3b7ce inteltool: Add output of 64bit registers in PMBASE

Patrick Georgi (patrick@georgi-clan.de) gerrit at coreboot.org
Fri Oct 26 15:39:16 CEST 2012


Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1625

-gerrit

commit 6e3b7cef795f0cad4a8b4003b6d65c0bf2f40bd1
Author: Nico Huber <nico.huber at secunet.com>
Date:   Mon Sep 24 10:58:41 2012 +0200

    inteltool: Add output of 64bit registers in PMBASE
    
    Output values of 64bit registers and fix settings for GPE0_EN for
    ICH9/10.
    
    Change-Id: I8ca6b32500331707670972b38466345f581844cd
    Signed-off-by: Nico Huber <nico.huber at secunet.com>
---
 util/inteltool/powermgt.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c
index 4974738..71dfc49 100644
--- a/util/inteltool/powermgt.c
+++ b/util/inteltool/powermgt.c
@@ -41,7 +41,7 @@ static const io_register_t ich10_pm_registers[] = {
 	{ 0x1a, 2, "RESERVED" },
 	{ 0x1c, 4, "RESERVED" },
 	{ 0x20, 8, "GPE0_STS" }, // General Purpose Event 0 Status; ACPI pointer: GPE0_BLK
-	{ 0x2C, 4, "GPE0_EN" },  // General Purpose Event 0 Enables; ACPI pointer: GPE0_BLK+8
+	{ 0x28, 8, "GPE0_EN" },  // General Purpose Event 0 Enables; ACPI pointer: GPE0_BLK+8
 	{ 0x30, 4, "SMI_EN" },
 	{ 0x34, 4, "SMI_STS" },
 	{ 0x38, 2, "ALT_GP_SMI_EN" },
@@ -102,7 +102,7 @@ static const io_register_t ich9_pm_registers[] = {
 	{ 0x1a, 2, "RESERVED" },
 	{ 0x1c, 4, "RESERVED" },
 	{ 0x20, 8, "GPE0_STS" }, // General Purpose Event 0 Status; ACPI pointer: GPE0_BLK
-	{ 0x2C, 4, "GPE0_EN" },  // General Purpose Event 0 Enables; ACPI pointer: GPE0_BLK+8
+	{ 0x28, 8, "GPE0_EN" },  // General Purpose Event 0 Enables; ACPI pointer: GPE0_BLK+8
 	{ 0x30, 4, "SMI_EN" },
 	{ 0x34, 4, "SMI_STS" },
 	{ 0x38, 2, "ALT_GP_SMI_EN" },
@@ -689,6 +689,14 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
 
 	for (i = 0; i < size; i++) {
 		switch (pm_registers[i].size) {
+		case 8:
+			printf("pmbase+0x%04x: 0x%08x (%s)\n"
+			       "               0x%08x\n",
+				pm_registers[i].addr,
+				inl(pmbase+pm_registers[i].addr),
+				pm_registers[i].name,
+				inl(pmbase+pm_registers[i].addr+4));
+			break;
 		case 4:
 			printf("pmbase+0x%04x: 0x%08x (%s)\n",
 				pm_registers[i].addr,




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