[coreboot] New patch to review for coreboot: 2e4ab4f console: Revise console initialization.

Hung-Te Lin (hungte@chromium.org) gerrit at coreboot.org
Wed Feb 6 13:45:30 CET 2013


Hung-Te Lin (hungte at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2299

-gerrit

commit 2e4ab4f237e12eb5cddc3bc6074da5f0001a27db
Author: Hung-Te Lin <hungte at chromium.org>
Date:   Wed Feb 6 17:51:19 2013 +0800

    console: Revise console initialization.
    
    Provides an unified way to configure and start console.
    In Kconfig, use these variables to control console output:
     - EARLY_CONSOLE: Outputs in pre-ram stage (bootblock and romstage).
     - CONSOLE_SERIAL: Enable serial output console, from one of following drivers:
       - CONSOLE_SERIAL8250 (standard 8250 chipset for most x86 devices)
       - CONSOLE_SERIAL8250MEM (8250 with memory-mapped I/O)
       - CONSOLE_SERIAL_UART (device-specific UART driver for most ARM devices)
    
    In bootblock/romstage/ramstage, to output message to console:
     #include <console/console.h>
     ...
     init_console();
     printk(level, format, ...);
    
    Change-Id: I4bea3c8fea05bbb7d78df6bc22f82414ac66f973
    Signed-off-by: Hung-Te Lin <hungte at chromium.org>
---
 src/Kconfig                             |  4 ++
 src/arch/armv7/Makefile.inc             |  9 ++--
 src/arch/armv7/bootblock_simple.c       |  2 +
 src/arch/armv7/include/common.h         | 13 ------
 src/arch/armv7/lib/Makefile.inc         |  8 ++--
 src/arch/armv7/lib/early_console.c      | 81 +++++++++++++++++++++++++++++++++
 src/arch/armv7/lib/romstage_console.c   | 73 -----------------------------
 src/console/Kconfig                     | 39 ++++++++--------
 src/console/Makefile.inc                |  8 ++--
 src/console/console.c                   | 10 ++--
 src/cpu/Kconfig                         |  2 +-
 src/cpu/samsung/Kconfig                 |  5 +-
 src/cpu/samsung/exynos5-common/uart.h   |  2 -
 src/cpu/samsung/exynos5250/Makefile.inc | 13 ++----
 src/cpu/samsung/exynos5250/uart.c       |  4 +-
 src/include/console/console.h           | 21 +++++++--
 src/include/uart.h                      |  9 ++--
 src/mainboard/google/snow/Kconfig       |  5 +-
 src/mainboard/google/snow/bootblock.c   | 12 ++---
 19 files changed, 163 insertions(+), 157 deletions(-)

diff --git a/src/Kconfig b/src/Kconfig
index 92bdf11..32a63d8 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -277,6 +277,10 @@ config HAVE_UART_MEMORY_MAPPED
 	bool
 	default n
 
+config HAVE_UART_SPECIAL
+	bool
+	default n
+
 config HAVE_ACPI_RESUME
 	bool
 	default n
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index 7d02e7c..0471b94 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -223,17 +223,18 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc)
 
 $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -Wa,-acdlns -c -o $@ $<  > $(basename $@).disasm
+	$(CC) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $<  > $(basename $@).disasm
 
 $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
+	$(CC) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
 
 $(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H)
 	@printf "    CC      $(subst $(obj)/,,$(@))\n"
-	$(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \
+	$(CC) $(bootblock-c-ccopts) $(INCLUDES) -MM \
+		-MT$(objgenerated)/bootblock.inc \
 		$< > $(objgenerated)/bootblock.inc.d
-	$(CC) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@
+	$(CC) $(bootblock-c-ccopts) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@
 
 $(objcbfs)/bootblock.debug:  $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages)
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/armv7/bootblock_simple.c
index fe2662e..0132b87 100644
--- a/src/arch/armv7/bootblock_simple.c
+++ b/src/arch/armv7/bootblock_simple.c
@@ -23,6 +23,7 @@
 #include <arch/hlt.h>
 #include <arch/stages.h>
 #include <cbfs.h>
+#include <console/console.h>
 
 #include "stages.c"
 
@@ -46,6 +47,7 @@ void main(void)
 		bootblock_mainboard_init();
 	}
 
+	console_init();
 	printk(BIOS_INFO, "hello from bootblock\n");
 	printk(BIOS_INFO, "bootblock main(): loading romstage\n");
 	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
diff --git a/src/arch/armv7/include/common.h b/src/arch/armv7/include/common.h
index d95a74d..d8698db 100644
--- a/src/arch/armv7/include/common.h
+++ b/src/arch/armv7/include/common.h
@@ -422,19 +422,6 @@ int strcmp_compar(const void *, const void *);
 /* lib/time.c */
 void	udelay        (unsigned long);
 
-#if 0
-/* lib/vsprintf.c */
-ulong	simple_strtoul(const char *cp,char **endp,unsigned int base);
-int strict_strtoul(const char *cp, unsigned int base, unsigned long *res);
-unsigned long long	simple_strtoull(const char *cp,char **endp,unsigned int base);
-long	simple_strtol(const char *cp,char **endp,unsigned int base);
-void	panic(const char *fmt, ...)
-		__attribute__ ((format (__printf__, 1, 2), noreturn));
-int	sprintf(char * buf, const char *fmt, ...)
-		__attribute__ ((format (__printf__, 2, 3)));
-int	vsprintf(char *buf, const char *fmt, va_list args);
-#endif
-
 /* lib/strmhz.c */
 char *	strmhz(char *buf, unsigned long hz);
 
diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc
index 343e9f8..b8dab64 100644
--- a/src/arch/armv7/lib/Makefile.inc
+++ b/src/arch/armv7/lib/Makefile.inc
@@ -1,14 +1,14 @@
 bootblock-y += syslib.c
-bootblock-y += romstage_console.c
+bootblock-$(CONFIG_EARLY_CONSOLE) += early_console.c
+# bootblock-y += early_console.c
 
 romstage-y += cache_v7.c
 romstage-y += cache-cp15.c
 romstage-y += div0.c
 romstage-y += div64.S
-romstage-y += romstage_console.c
 romstage-y += syslib.c
-
-#ramstage-y += printk_init.c
+# romstage-y += early_console.c
+romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c
 
 ramstage-y += div0.c
 ramstage-y += div64.S
diff --git a/src/arch/armv7/lib/early_console.c b/src/arch/armv7/lib/early_console.c
new file mode 100644
index 0000000..68e81c6
--- /dev/null
+++ b/src/arch/armv7/lib/early_console.c
@@ -0,0 +1,81 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <console/vtxprintf.h>
+
+/* FIXME: need to make console driver more generic */
+void console_tx_byte(unsigned char byte)
+{
+	if (byte == '\n')
+		console_tx_byte('\r');
+
+#if CONFIG_CONSOLE_SERIAL8250MEM
+	if (oxford_oxpcie_present) {
+		uart8250_mem_tx_byte(
+			CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000, byte);
+	}
+#endif
+#if CONFIG_CONSOLE_SERIAL8250
+	uart8250_tx_byte(CONFIG_TTYS0_BASE, byte);
+#endif
+#if CONFIG_CONSOLE_SERIAL_UART
+	uart_tx_byte(byte);
+#endif
+#if CONFIG_USBDEBUG
+	usbdebug_tx_byte(0, byte);
+#endif
+#if CONFIG_CONSOLE_CBMEM
+	cbmemc_tx_byte(byte);
+#endif
+}
+
+static void _console_tx_flush(void)
+{
+#if CONFIG_CONSOLE_SERIAL8250MEM
+	uart8250_mem_tx_flush(CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000);
+#endif
+#if CONFIG_CONSOLE_SERIAL8250
+	uart8250_tx_flush(CONFIG_TTYS0_BASE);
+#endif
+#if CONFIG_CONSOLE_SERIAL_UART
+	uart_tx_flush();
+#endif
+#if CONFIG_USBDEBUG
+	usbdebug_tx_flush(0);
+#endif
+}
+
+int do_printk(int msg_level, const char *fmt, ...)
+{
+	va_list args;
+	int i;
+
+	if (msg_level > console_loglevel) {
+		return 0;
+	}
+
+	va_start(args, fmt);
+	i = vtxprintf(console_tx_byte, fmt, args);
+	va_end(args);
+
+	_console_tx_flush();
+
+	return i;
+}
diff --git a/src/arch/armv7/lib/romstage_console.c b/src/arch/armv7/lib/romstage_console.c
deleted file mode 100644
index 42a9664..0000000
--- a/src/arch/armv7/lib/romstage_console.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-#include <console/console.h>
-#include <console/vtxprintf.h>
-// TODO Unify with x86 (CONFIG_CONSOLE_SERIAL8250)
-#if CONFIG_SERIAL_CONSOLE
-#include <uart.h>
-#endif
-#if CONFIG_USBDEBUG
-#include <usbdebug.h>
-#endif
-
-/* FIXME: need to make console driver more generic */
-void console_tx_byte(unsigned char byte)
-{
-	if (byte == '\n')
-		console_tx_byte('\r');
-
-#if CONFIG_SERIAL_CONSOLE
-	uart_tx_byte(byte);
-#endif
-#if CONFIG_USBDEBUG
-	usbdebug_tx_byte(0, byte);
-#endif
-#if CONFIG_CONSOLE_CBMEM
-	cbmemc_tx_byte(byte);
-#endif
-}
-
-static void _console_tx_flush(void)
-{
-#if CONFIG_SERIAL_CONSOLE
-	uart_tx_flush();
-#endif
-#if CONFIG_USBDEBUG
-	usbdebug_tx_flush(0);
-#endif
-}
-
-int do_printk(int msg_level, const char *fmt, ...)
-{
-	va_list args;
-	int i;
-
-	if (msg_level > console_loglevel) {
-		return 0;
-	}
-
-	va_start(args, fmt);
-	i = vtxprintf(console_tx_byte, fmt, args);
-	va_end(args);
-
-	_console_tx_flush();
-
-	return i;
-}
diff --git a/src/console/Kconfig b/src/console/Kconfig
index b1f41de..e57d568 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -1,20 +1,21 @@
 menu "Console"
-config SERIAL_CONSOLE
-	bool "Serial port console output"
-	default y
-	help
-	  Send coreboot debug output to a serial port
 
-config EARLY_SERIAL_CONSOLE
-	bool
-	depends on SERIAL_CONSOLE
+config EARLY_CONSOLE
+	bool "Enable early (pre-RAM) console output."
 	default n
 	help
-	  Use serial console during early (pre-RAM) boot stages
+	  Use console during early (pre-RAM) boot stages
+
+config CONSOLE_SERIAL
+	bool "Serial port console output"
+	default y
+	help
+	  Send coreboot debug output to a serial port (should be one or more of
+	  CONSOLE_SERIAL8250, CONSOLE_SERIAL8250MEM, CONSOLE_SERIAL_UART)
 
 config CONSOLE_SERIAL8250
 	bool "Serial port console output (I/O mapped, 8250-compatible)"
-	depends on SERIAL_CONSOLE
+	depends on CONSOLE_SERIAL
 	depends on HAVE_UART_IO_MAPPED
 	default y
 	help
@@ -22,21 +23,21 @@ config CONSOLE_SERIAL8250
 
 config CONSOLE_SERIAL8250MEM
 	bool "Serial port console output (memory mapped, 8250-compatible)"
-	depends on SERIAL_CONSOLE
+	depends on CONSOLE_SERIAL
 	depends on HAVE_UART_MEMORY_MAPPED
 	help
 	  Send coreboot debug output to a memory mapped serial port console.
 
-config CONSOLE_SERIAL_NONSTANDARD_MEM
-	bool "Serial port console output (memory-mapped, device-specific)"
-	depends on SERIAL_CONSOLE
-	depends on HAVE_UART_MEMORY_MAPPED
+config CONSOLE_SERIAL_UART
+	bool "Serial port console output (device-specific UART)"
+	depends on CONSOLE_SERIAL
+	depends on HAVE_UART_SPECIAL
+	default y
 	help
-	  Send coreboot debug output to a memory mapped serial port console
-	  on a device-specific UART.
+	  Send coreboot debug output to a device-specific serial port console.
 
 choice
-	prompt "Serial port"
+	prompt "Serial port for 8250"
 	default CONSOLE_SERIAL_COM1
 	depends on CONSOLE_SERIAL8250
 
@@ -72,7 +73,7 @@ config TTYS0_BASE
 choice
 	prompt "Baud rate"
 	default CONSOLE_SERIAL_115200
-	depends on SERIAL_CONSOLE
+	depends on CONSOLE_SERIAL
 
 config CONSOLE_SERIAL_115200
 	bool "115200"
diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc
index 42d3282..9ce3474 100644
--- a/src/console/Makefile.inc
+++ b/src/console/Makefile.inc
@@ -9,13 +9,13 @@ smm-y += printk.c
 smm-y += vtxprintf.c
 smm-$(CONFIG_SMM_TSEG) += die.c
 
-romstage-y += vtxprintf.c
-romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c
+romstage-$(CONFIG_EARLY_CONSOLE) += vtxprintf.c
+romstage-y += console.c
 romstage-y += post.c
 romstage-y += die.c
 
-bootblock-y += vtxprintf.c
-bootblock-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c
+bootblock-$(CONFIG_EARLY_CONSOLE) += vtxprintf.c
+bootblock-y += console.c
 bootblock-y += post.c
 bootblock-y += die.c
 
diff --git a/src/console/console.c b/src/console/console.c
index 4c47d7f..fc77df7 100644
--- a/src/console/console.c
+++ b/src/console/console.c
@@ -99,15 +99,15 @@ int console_tst_byte(void)
 
 #else // __PRE_RAM__   ^^^ NOT defined   vvv defined
 
-#include <uart.h>
-
 void console_init(void)
 {
+#if CONFIG_EARLY_CONSOLE
+
 #if CONFIG_USBDEBUG
 	enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
-#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
+#if CONFIG_CONSOLE_SERIAL
 	uart_init();
 #endif
 #if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM
@@ -127,5 +127,7 @@ void console_init(void)
 		COREBOOT_BUILD
 		" starting...\n";
 	print_info(console_test);
+
+#endif /* CONFIG_EARLY_CONSOLE */
 }
-#endif
+#endif /* __PRE_RAM__ */
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index ddc46cf..c2c3816 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -16,7 +16,7 @@ source src/cpu/x86/Kconfig
 
 config CACHE_AS_RAM
 	bool
-	select EARLY_SERIAL_CONSOLE
+	select EARLY_CONSOLE
 	default !ROMCC
 
 config DCACHE_RAM_BASE
diff --git a/src/cpu/samsung/Kconfig b/src/cpu/samsung/Kconfig
index abfc049..c905b2a 100644
--- a/src/cpu/samsung/Kconfig
+++ b/src/cpu/samsung/Kconfig
@@ -5,7 +5,10 @@ config CPU_SAMSUNG_EXYNOS
 config CPU_SAMSUNG_EXYNOS5
 	depends on ARCH_ARMV7
 	select CPU_SAMSUNG_EXYNOS
-	select EARLY_SERIAL_CONSOLE
+	select HAVE_UART_SPECIAL
+	# TODO remove EARLY_CONSOLE when we can run ramstage without early UART
+	# init.
+	select EARLY_CONSOLE
 	bool
 	default n
 
diff --git a/src/cpu/samsung/exynos5-common/uart.h b/src/cpu/samsung/exynos5-common/uart.h
index 52da62d..350e224 100644
--- a/src/cpu/samsung/exynos5-common/uart.h
+++ b/src/cpu/samsung/exynos5-common/uart.h
@@ -52,6 +52,4 @@ static inline int s5p_uart_divslot(void)
 	return 0;
 }
 
-void uart_init(void);
-
 #endif
diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc
index e2033ff..7e11536 100644
--- a/src/cpu/samsung/exynos5250/Makefile.inc
+++ b/src/cpu/samsung/exynos5250/Makefile.inc
@@ -11,7 +11,7 @@ bootblock-y += clock.c
 bootblock-y += pinmux.c
 bootblock-y += power.c
 bootblock-y += soc.c
-bootblock-y += uart.c
+bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c
 
 romstage-y += clock.c
 romstage-y += clock_init.c
@@ -19,23 +19,18 @@ romstage-y += exynos_cache.c
 romstage-y += pinmux.c
 romstage-y += power.c
 romstage-y += soc.c
-romstage-y += uart.c
 romstage-y += dmc_common.c
 romstage-y += dmc_init_ddr3.c
+romstage-$(CONFIG_EARLY_CONSOLE) += uart.c
 
-#ramstage-y += clock.c
-#ramstage-y += clock_init.c
-#ramstage-y += power.c
-#ramstage-y += uart.c
-#ramstage-y += pinmux.c
-##ramstage-y += tzpc_init.c
+#ramstage-y += tzpc_init.c
 ramstage-y += clock.c
 ramstage-y += clock_init.c
 ramstage-y += exynos_cache.c
 ramstage-y += pinmux.c
 ramstage-y += power.c
 ramstage-y += soc.c
-ramstage-y += uart.c
+ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
 
 #ramstage-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.c
 #ramstage-$(CONFIG_SATA_AHCI) += sata.c
diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c
index 3126d7a..dacdc10 100644
--- a/src/cpu/samsung/exynos5250/uart.c
+++ b/src/cpu/samsung/exynos5250/uart.c
@@ -28,6 +28,8 @@
 #include <console/console.h>	/* for __console definition */
 
 #include <cpu/samsung/exynos5-common/exynos5-common.h>
+#include <cpu/samsung/exynos5-common/uart.h>
+#include <cpu/samsung/exynos5250/uart.h>
 #include <cpu/samsung/exynos5250/clk.h>
 
 #define RX_FIFO_COUNT_MASK	0xff
@@ -188,7 +190,7 @@ static void exynos5_uart_tx_byte(unsigned char data)
 	writeb(data, &uart->utxh);
 }
 
-#if !defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__)
+#if !defined(__PRE_RAM__)
 static const struct console_driver exynos5_uart_console __console = {
 	.init     = exynos5_init_dev,
 	.tx_byte  = exynos5_uart_tx_byte,
diff --git a/src/include/console/console.h b/src/include/console/console.h
index 375e5a4..6b057f0 100644
--- a/src/include/console/console.h
+++ b/src/include/console/console.h
@@ -24,8 +24,8 @@
 #include <console/loglevel.h>
 #include <console/post_codes.h>
 
-#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
-#include <uart8250.h>
+#if CONFIG_CONSOLE_SERIAL
+#include <uart.h>
 #endif
 #if CONFIG_USBDEBUG
 #include <usbdebug.h>
@@ -74,6 +74,15 @@ void mainboard_post(u8 value);
 void __attribute__ ((noreturn)) die(const char *msg);
 int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
 
+#if defined(__PRE_RAM__) && !CONFIG_EARLY_CONSOLE
+
+static inline void printk(int LEVEL, const char *fmt, ...);
+static inline void printk(int LEVEL, const char *fmt, ...) {
+	/* Do nothing. */
+}
+
+#else /* defined(__PRE_RAM__) && !CONFIG_EARLY_CONSOLE */
+
 #undef WE_CLEANED_UP_ALL_SIDE_EFFECTS
 /* We saw some strange effects in the past like coreboot crashing while
  * disabling cache as ram for a maximum console log level of 6 and above while
@@ -88,6 +97,7 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf,
  * avoid this, do a
  * #define WE_CLEANED_UP_ALL_SIDE_EFFECTS
  */
+
 #ifdef WE_CLEANED_UP_ALL_SIDE_EFFECTS
 
 #define printk(LEVEL, fmt, args...)				\
@@ -97,7 +107,7 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf,
 		}						\
 	} while(0)
 
-#else
+#else /* WE_CLEANED_UP_ALL_SIDE_EFFECTS */
 
 #define printk(LEVEL, fmt, args...)				\
 	do {							\
@@ -107,7 +117,10 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf,
 			do_printk(BIOS_NEVER, fmt, ##args);	\
 		}						\
 	} while(0)
-#endif
+
+#endif /* WE_CLEANED_UP_ALL_SIDE_EFFECTS */
+
+#endif /* defined(__PRE_RAM__) && !CONFIG_EARLY_CONSOLE */
 
 #define print_emerg(STR)         printk(BIOS_EMERG,  "%s", (STR))
 #define print_alert(STR)         printk(BIOS_ALERT,  "%s", (STR))
diff --git a/src/include/uart.h b/src/include/uart.h
index 2a72575..ca5191e 100644
--- a/src/include/uart.h
+++ b/src/include/uart.h
@@ -26,18 +26,15 @@
 #ifndef UART_H
 #define UART_H
 
-#if CONFIG_CONSOLE_SERIAL8250
+#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
 #include <uart8250.h>
 #endif
 
-#if CONFIG_CPU_SAMSUNG_EXYNOS5
-#include <cpu/samsung/exynos5-common/uart.h>
-#endif
-
-#ifndef __ROMCC__
+#if !defined(__ROMCC__) && CONFIG_CONSOLE_SERIAL_UART
 unsigned char uart_rx_byte(void);
 void uart_tx_byte(unsigned char data);
 void uart_tx_flush(void);
+void uart_init(void);
 #endif
 
 #endif /* UART_H */
diff --git a/src/mainboard/google/snow/Kconfig b/src/mainboard/google/snow/Kconfig
index a0c76d6..bee987d 100644
--- a/src/mainboard/google/snow/Kconfig
+++ b/src/mainboard/google/snow/Kconfig
@@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select ARCH_ARMV7
 	select CPU_SAMSUNG_EXYNOS5
 	select HAVE_UART_MEMORY_MAPPED
-	select CONSOLE_SERIAL_NONSTANDARD_MEM	# enable serial debugging
 #	select EC_GOOGLE_CHROMEEC
 	select BOARD_ROMSIZE_KB_4096
 	select DRIVER_MAXIM_MAX77686
@@ -71,7 +70,7 @@ config NR_DRAM_BANKS
 choice
 	prompt "Serial Console UART"
 	default CONSOLE_SERIAL_UART3
-	depends on CONSOLE_SERIAL_NONSTANDARD_MEM
+	depends on CONSOLE_SERIAL_UART
 
 config CONSOLE_SERIAL_UART0
 	bool "UART0"
@@ -97,7 +96,7 @@ endchoice
 
 config CONSOLE_SERIAL_UART_ADDRESS
 	hex
-	depends on CONSOLE_SERIAL_NONSTANDARD_MEM
+	depends on CONSOLE_SERIAL_UART
 	default 0x12c00000 if CONSOLE_SERIAL_UART0
 	default 0x12c10000 if CONSOLE_SERIAL_UART1
 	default 0x12c20000 if CONSOLE_SERIAL_UART2
diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c
index 64b12c6..be5a99f 100644
--- a/src/mainboard/google/snow/bootblock.c
+++ b/src/mainboard/google/snow/bootblock.c
@@ -17,12 +17,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#if CONFIG_EARLY_SERIAL_CONSOLE
 #include <types.h>
 #include <arch/io.h>
-#include <cbfs.h>
-#include <uart.h>
-#include <console/console.h>
 #include <device/i2c.h>
 #include <cpu/samsung/exynos5250/clk.h>
 #include <cpu/samsung/exynos5250/dmc.h>
@@ -30,9 +26,9 @@
 #include <cpu/samsung/exynos5250/clock_init.h>
 #include <src/cpu/samsung/exynos5250/power.h>
 #include <drivers/maxim/max77686/max77686.h>
+#include <console/console.h>
 
 #define I2C0_BASE	0x12c60000
-#endif
 
 void bootblock_mainboard_init(void);
 void bootblock_mainboard_init(void)
@@ -46,10 +42,8 @@ void bootblock_mainboard_init(void)
 	mem = get_mem_timings();
 	arm_ratios = get_arm_clk_ratios();
 	system_clock_init(mem, arm_ratios);
-
-#if CONFIG_EARLY_SERIAL_CONSOLE
 	exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
-	uart_init();
+
+	console_init();
 	printk(BIOS_INFO, "\n\n\n%s: UART initialized\n", __func__);
-#endif
 }



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