[coreboot] Patch set updated for coreboot: 7a60eca console: Revise serial console configuration names.
Hung-Te Lin (hungte@chromium.org)
gerrit at coreboot.org
Thu Feb 7 04:01:35 CET 2013
Hung-Te Lin (hungte at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2299
-gerrit
commit 7a60eca29dbb24172553f54ade06153912cb7d02
Author: Hung-Te Lin <hungte at chromium.org>
Date: Wed Feb 6 21:24:12 2013 +0800
console: Revise serial console configuration names.
The console drivers (especially serial drivers) in Kconfig were named in
different styles. This CL will change configuration names to a better naming
style.
- EARLY_CONSOLE:
Enable output in pre-ram stage. (Renamed from EARLY_SERIAL_CONSOLE
because it also supports non-serial)
- CONSOLE_SERIAL:
Enable serial output console, from one of the serial drivers. (Renamed
from SERIAL_CONSOLE because other non-serial drivers were named as
CONSOLE_XXX like CONSOLE_CBMEM)
- CONSOLE_SERIAL_UART:
Device-specific UART driver. (Renamed from
CONSOLE_SERIAL_NONSTANDARD_MEM because it may be not memory-mapped)
- HAVE_UART_SPECIAL:
A dependency for CONSOLE_SERIAL_UART.
Change-Id: I4bea3c8fea05bbb7d78df6bc22f82414ac66f973
Signed-off-by: Hung-Te Lin <hungte at chromium.org>
---
src/Kconfig | 4 ++++
src/arch/armv7/lib/romstage_console.c | 6 +++---
src/console/Kconfig | 39 ++++++++++++++++++-----------------
src/console/Makefile.inc | 4 ++--
src/console/console.c | 2 +-
src/cpu/Kconfig | 2 +-
src/cpu/samsung/Kconfig | 5 ++++-
src/include/console/console.h | 4 ++--
src/mainboard/google/snow/Kconfig | 5 ++---
src/mainboard/google/snow/bootblock.c | 4 ++--
10 files changed, 41 insertions(+), 34 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index 92bdf11..32a63d8 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -277,6 +277,10 @@ config HAVE_UART_MEMORY_MAPPED
bool
default n
+config HAVE_UART_SPECIAL
+ bool
+ default n
+
config HAVE_ACPI_RESUME
bool
default n
diff --git a/src/arch/armv7/lib/romstage_console.c b/src/arch/armv7/lib/romstage_console.c
index 42a9664..b0ac34e 100644
--- a/src/arch/armv7/lib/romstage_console.c
+++ b/src/arch/armv7/lib/romstage_console.c
@@ -20,7 +20,7 @@
#include <console/console.h>
#include <console/vtxprintf.h>
// TODO Unify with x86 (CONFIG_CONSOLE_SERIAL8250)
-#if CONFIG_SERIAL_CONSOLE
+#if CONFIG_CONSOLE_SERIAL
#include <uart.h>
#endif
#if CONFIG_USBDEBUG
@@ -33,7 +33,7 @@ void console_tx_byte(unsigned char byte)
if (byte == '\n')
console_tx_byte('\r');
-#if CONFIG_SERIAL_CONSOLE
+#if CONFIG_CONSOLE_SERIAL_UART
uart_tx_byte(byte);
#endif
#if CONFIG_USBDEBUG
@@ -46,7 +46,7 @@ void console_tx_byte(unsigned char byte)
static void _console_tx_flush(void)
{
-#if CONFIG_SERIAL_CONSOLE
+#if CONFIG_CONSOLE_SERIAL_UART
uart_tx_flush();
#endif
#if CONFIG_USBDEBUG
diff --git a/src/console/Kconfig b/src/console/Kconfig
index b1f41de..e57d568 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -1,20 +1,21 @@
menu "Console"
-config SERIAL_CONSOLE
- bool "Serial port console output"
- default y
- help
- Send coreboot debug output to a serial port
-config EARLY_SERIAL_CONSOLE
- bool
- depends on SERIAL_CONSOLE
+config EARLY_CONSOLE
+ bool "Enable early (pre-RAM) console output."
default n
help
- Use serial console during early (pre-RAM) boot stages
+ Use console during early (pre-RAM) boot stages
+
+config CONSOLE_SERIAL
+ bool "Serial port console output"
+ default y
+ help
+ Send coreboot debug output to a serial port (should be one or more of
+ CONSOLE_SERIAL8250, CONSOLE_SERIAL8250MEM, CONSOLE_SERIAL_UART)
config CONSOLE_SERIAL8250
bool "Serial port console output (I/O mapped, 8250-compatible)"
- depends on SERIAL_CONSOLE
+ depends on CONSOLE_SERIAL
depends on HAVE_UART_IO_MAPPED
default y
help
@@ -22,21 +23,21 @@ config CONSOLE_SERIAL8250
config CONSOLE_SERIAL8250MEM
bool "Serial port console output (memory mapped, 8250-compatible)"
- depends on SERIAL_CONSOLE
+ depends on CONSOLE_SERIAL
depends on HAVE_UART_MEMORY_MAPPED
help
Send coreboot debug output to a memory mapped serial port console.
-config CONSOLE_SERIAL_NONSTANDARD_MEM
- bool "Serial port console output (memory-mapped, device-specific)"
- depends on SERIAL_CONSOLE
- depends on HAVE_UART_MEMORY_MAPPED
+config CONSOLE_SERIAL_UART
+ bool "Serial port console output (device-specific UART)"
+ depends on CONSOLE_SERIAL
+ depends on HAVE_UART_SPECIAL
+ default y
help
- Send coreboot debug output to a memory mapped serial port console
- on a device-specific UART.
+ Send coreboot debug output to a device-specific serial port console.
choice
- prompt "Serial port"
+ prompt "Serial port for 8250"
default CONSOLE_SERIAL_COM1
depends on CONSOLE_SERIAL8250
@@ -72,7 +73,7 @@ config TTYS0_BASE
choice
prompt "Baud rate"
default CONSOLE_SERIAL_115200
- depends on SERIAL_CONSOLE
+ depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_115200
bool "115200"
diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc
index dd826d6..8e6037a 100644
--- a/src/console/Makefile.inc
+++ b/src/console/Makefile.inc
@@ -10,13 +10,13 @@ smm-y += vtxprintf.c
smm-$(CONFIG_SMM_TSEG) += die.c
romstage-y += vtxprintf.c
-romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c
+romstage-$(CONFIG_EARLY_CONSOLE) += console.c
romstage-y += post.c
romstage-y += die.c
# TODO Add vtxprintf.c only when early console is required.
bootblock-y += vtxprintf.c
-bootblock-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c
+bootblock-$(CONFIG_EARLY_CONSOLE) += console.c
bootblock-y += die.c
ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c
diff --git a/src/console/console.c b/src/console/console.c
index 4c47d7f..d4b4b88 100644
--- a/src/console/console.c
+++ b/src/console/console.c
@@ -107,7 +107,7 @@ void console_init(void)
enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
early_usbdebug_init();
#endif
-#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
+#if CONFIG_CONSOLE_SERIAL
uart_init();
#endif
#if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index ddc46cf..c2c3816 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -16,7 +16,7 @@ source src/cpu/x86/Kconfig
config CACHE_AS_RAM
bool
- select EARLY_SERIAL_CONSOLE
+ select EARLY_CONSOLE
default !ROMCC
config DCACHE_RAM_BASE
diff --git a/src/cpu/samsung/Kconfig b/src/cpu/samsung/Kconfig
index abfc049..c905b2a 100644
--- a/src/cpu/samsung/Kconfig
+++ b/src/cpu/samsung/Kconfig
@@ -5,7 +5,10 @@ config CPU_SAMSUNG_EXYNOS
config CPU_SAMSUNG_EXYNOS5
depends on ARCH_ARMV7
select CPU_SAMSUNG_EXYNOS
- select EARLY_SERIAL_CONSOLE
+ select HAVE_UART_SPECIAL
+ # TODO remove EARLY_CONSOLE when we can run ramstage without early UART
+ # init.
+ select EARLY_CONSOLE
bool
default n
diff --git a/src/include/console/console.h b/src/include/console/console.h
index 375e5a4..edd49e0 100644
--- a/src/include/console/console.h
+++ b/src/include/console/console.h
@@ -24,8 +24,8 @@
#include <console/loglevel.h>
#include <console/post_codes.h>
-#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
-#include <uart8250.h>
+#if CONFIG_CONSOLE_SERIAL
+#include <uart.h>
#endif
#if CONFIG_USBDEBUG
#include <usbdebug.h>
diff --git a/src/mainboard/google/snow/Kconfig b/src/mainboard/google/snow/Kconfig
index a0c76d6..bee987d 100644
--- a/src/mainboard/google/snow/Kconfig
+++ b/src/mainboard/google/snow/Kconfig
@@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select ARCH_ARMV7
select CPU_SAMSUNG_EXYNOS5
select HAVE_UART_MEMORY_MAPPED
- select CONSOLE_SERIAL_NONSTANDARD_MEM # enable serial debugging
# select EC_GOOGLE_CHROMEEC
select BOARD_ROMSIZE_KB_4096
select DRIVER_MAXIM_MAX77686
@@ -71,7 +70,7 @@ config NR_DRAM_BANKS
choice
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART3
- depends on CONSOLE_SERIAL_NONSTANDARD_MEM
+ depends on CONSOLE_SERIAL_UART
config CONSOLE_SERIAL_UART0
bool "UART0"
@@ -97,7 +96,7 @@ endchoice
config CONSOLE_SERIAL_UART_ADDRESS
hex
- depends on CONSOLE_SERIAL_NONSTANDARD_MEM
+ depends on CONSOLE_SERIAL_UART
default 0x12c00000 if CONSOLE_SERIAL_UART0
default 0x12c10000 if CONSOLE_SERIAL_UART1
default 0x12c20000 if CONSOLE_SERIAL_UART2
diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c
index 64b12c6..ff5e4a0 100644
--- a/src/mainboard/google/snow/bootblock.c
+++ b/src/mainboard/google/snow/bootblock.c
@@ -17,7 +17,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_EARLY_SERIAL_CONSOLE
+#if CONFIG_EARLY_CONSOLE
#include <types.h>
#include <arch/io.h>
#include <cbfs.h>
@@ -47,7 +47,7 @@ void bootblock_mainboard_init(void)
arm_ratios = get_arm_clk_ratios();
system_clock_init(mem, arm_ratios);
-#if CONFIG_EARLY_SERIAL_CONSOLE
+#if CONFIG_EARLY_CONSOLE
exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
uart_init();
printk(BIOS_INFO, "\n\n\n%s: UART initialized\n", __func__);
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