[coreboot] Patch merged into coreboot/master: 3d990ff Supermicro H8QGI: Substract 1 from MMCONF range limit

gerrit at coreboot.org gerrit at coreboot.org
Mon Feb 11 08:27:52 CET 2013

the following patch was just integrated into master:
commit 3d990ffc88f5d54f32de28cc6a2a87f490bd701a
Author: Konstantin Aladyshev <aladyshev at nicevt.ru>
Date:   Fri Jan 25 19:20:51 2013 +0400

    Supermicro H8QGI: Substract 1 from MMCONF range limit
    MMCONF space is defined by two config parameters:
    MMCONF_BASE_ADDRESS (0xF800 0000)
    Coreboot allocates 1MB per bus, so MMCONF limit should be:
    0xF800 0000 + 64*(0x0010 0000) - 1 = 0xFBFF FFFF
    Current code does not have (-1) component, this makes MMCONF limit
    equal 0xFC00 FFFF. Not 0xFC00 0000, because according to BKDG
    lower two bytes of MMIO limit always equal 0xFFFF:
    MMIOLimit = {MMIOLimitRegister[47:16], FFFFh}.
    Add (-1) to correct this issue.
    No functionality change has been experienced. The five times
    slower RAM speed compared to the proprietary vendor BIOS still
    Change-Id: I2c6494c28bb8d36e54ceb2aa7d8d965b0103cbe9
    Signed-off-by: Konstantin Aladyshev <aladyshev at nicevt.ru>
    Reviewed-on: http://review.coreboot.org/2193
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martin.roth at se-eng.com>
    Reviewed-by: Patrick Georgi <patrick at georgi-clan.de>

Reviewed-By: Patrick Georgi <patrick at georgi-clan.de> at Mon Feb 11 08:27:51 2013, giving +2
See http://review.coreboot.org/2193 for details.


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