[coreboot] Patch set updated for coreboot: aa81983 snow: add kconfig option to select stack location

David Hendricks (dhendrix@chromium.org) gerrit at coreboot.org
Wed Feb 13 03:07:56 CET 2013


David Hendricks (dhendrix at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2350

-gerrit

commit aa819837cd0ebd7324de2175d39e6b7ae9f4e912
Author: David Hendricks <dhendrix at chromium.org>
Date:   Sun Feb 10 15:59:22 2013 -0800

    snow: add kconfig option to select stack location
    
    This patch allows us to select where to place our stack. The user
    may select to leave it in IRAM or switch to DRAM once in ramstage.
    By default the stack will stay in IRAM, but facilities are kept in
    to allow for the stack in DRAM.
    
    IRAM is always used up thru romstage. Both options seem to work for
    ramstage and beyond (for what testing we've been able to do...).
    
    (credit to Gabe for this one, I'm just putting it up on gerrit)
    
    Change-Id: I2e447d6359d52e4615e1cd7811e6f167e3dc314b
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
    Signed-off-by: Gabe Black <gabeblack at chromium.org>
---
 src/arch/armv7/Kconfig               |  4 ++++
 src/arch/armv7/coreboot_ram.ld       |  3 ++-
 src/cpu/samsung/exynos5250/Kconfig   | 21 +++++++++++++++++++++
 src/mainboard/google/snow/ramstage.c | 17 ++++++++++++++++-
 4 files changed, 43 insertions(+), 2 deletions(-)

diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig
index 488ca97..fe36d79 100644
--- a/src/arch/armv7/Kconfig
+++ b/src/arch/armv7/Kconfig
@@ -49,4 +49,8 @@ config ARM_DCACHE_POLICY_WRITETHROUGH
 	bool
 	default n
 
+config STACK_SIZE
+	hex
+	default 0x1000
+
 endmenu
diff --git a/src/arch/armv7/coreboot_ram.ld b/src/arch/armv7/coreboot_ram.ld
index 0644e36..779353b 100644
--- a/src/arch/armv7/coreboot_ram.ld
+++ b/src/arch/armv7/coreboot_ram.ld
@@ -96,7 +96,8 @@ SECTIONS
 	_end = .;
 
 	/* coreboot really "ends" here. Only heap and stack are placed after
-	 * this line.
+	 * this line. Note: Depending on the SoC, the stack may actually reside
+	 * somewhere else (ie SRAM).
 	 */
 
 	. = ALIGN(CONFIG_STACK_SIZE);
diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig
index 2869d76..52feda5 100644
--- a/src/cpu/samsung/exynos5250/Kconfig
+++ b/src/cpu/samsung/exynos5250/Kconfig
@@ -77,6 +77,27 @@ config IRAM_STACK
 	hex
 	default 0x02077f00
 
+choice
+	prompt "Stack location"
+
+config STACK_IN_IRAM
+	bool "Place stack in IRAM"
+	default y
+
+config STACK_IN_DRAM
+	bool "Place stack in DRAM in ramstage"
+
+endchoice
+
+config STACK_ADDR
+	hex "Stack address"
+	depends on STACK_IN_IRAM
+	default IRAM_STACK
+
+config STACK_SIZE
+	hex
+	default 0x1000
+
 # FIXME: other magic numbers that should probably go away
 config XIP_ROM_SIZE
 	hex
diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c
index a3e9236..b5bf3b7 100644
--- a/src/mainboard/google/snow/ramstage.c
+++ b/src/mainboard/google/snow/ramstage.c
@@ -17,6 +17,7 @@
  * MA 02111-1307 USA
  */
 
+#include <lib.h>
 #include <console/console.h>
 
 #if CONFIG_WRITE_HIGH_TABLES
@@ -24,7 +25,7 @@
 #endif
 
 void hardwaremain(int boot_complete);
-void main(void)
+static void real_main(void)
 {
 	console_init();
 	printk(BIOS_INFO, "hello from ramstage\n");
@@ -39,3 +40,17 @@ void main(void)
 
 	hardwaremain(0);
 }
+
+void main(void)
+{
+#if CONFIG_STACK_IN_DRAM
+	__asm__ __volatile__(
+		"mov sp, %0\n\r"
+		"mov pc, %1\n\r"
+		:
+		:"r"(_estack), "r"(&real_main)
+	);
+#else
+	real_main();
+#endif
+}



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