[coreboot] New patch to review for coreboot: 0daaa02 AMD S3: Include the s3_resume.h only when S3 is enalbed.
Zheng Bao (zheng.bao@amd.com)
gerrit at coreboot.org
Wed Feb 13 15:13:54 CET 2013
Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2384
-gerrit
commit 0daaa02d6c65629a71a8fffa3a63b6f9ba4f3472
Author: Zheng Bao <fishbaozi at gmail.com>
Date: Wed Feb 13 22:06:11 2013 +0800
AMD S3: Include the s3_resume.h only when S3 is enalbed.
Change-Id: I9a6c4f61e5dda6665f92c8526bb26a458ee2b739
Signed-off-by: Zheng Bao <zheng.bao at amd.com>
Signed-off-by: zheng Bao <fishbaozi at gmail.com>
---
src/cpu/amd/agesa/family14/model_14_init.c | 2 ++
src/cpu/amd/agesa/family15tn/model_15_init.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index 9cc36e2..7fac016 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -33,7 +33,9 @@
#include <cpu/x86/mtrr.h>
#include <cpu/amd/amdfam14.h>
#include <arch/acpi.h>
+#if CONFIG_HAVE_ACPI_RESUME
#include <cpu/amd/agesa/s3_resume.h>
+#endif
#define MCI_STATUS 0x401
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index 39533bb..68cb0d2 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -33,7 +33,9 @@
#include <cpu/x86/mtrr.h>
#include <cpu/amd/amdfam15.h>
#include <arch/acpi.h>
+#if CONFIG_HAVE_ACPI_RESUME
#include <cpu/amd/agesa/s3_resume.h>
+#endif
msr_t rdmsr_amd(u32 index)
{
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