[coreboot] Patch set updated for coreboot: 45db4c1 Tyan S8226: Fix integer truncated warning

Paul Menzel (paulepanter@users.sourceforge.net) gerrit at coreboot.org
Tue Feb 19 11:54:28 CET 2013


Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2452

-gerrit

commit 45db4c157af9cb6f4da3fae8bce5b5b4cf99c10a
Author: Martin Roth <martin.roth at se-eng.com>
Date:   Mon Feb 18 21:42:18 2013 -0700

    Tyan S8226: Fix integer truncated warning
    
    Fix Warning:
      sb700_cfg.c:129, GNU Compiler 4 (gcc), Priority: Normal
      large integer implicitly truncated to unsigned type [-Woverflow]
    
    The issue here was that an 8 bit value was being placed into a 2-bit
    bitfield.
    
        $ more src/vendorcode/amd/cimx/sb700/SBTYPE.h
        […]
        UINT32  AzaliaSdin0     :2;                     //6
        UINT32  AzaliaSdin1     :2;                     //8
        UINT32  AzaliaSdin2     :2;                     //10
        UINT32  AzaliaSdin3     :2;                     //12
        $ more src/mainboard/tyan/s8226/sb700_cfg.h
        […]
         *  SDIN0 is define at BIT0 & BIT1
         *   00 - GPIO PIN
         *   01 - Reserved
         *   10 - As a Azalia SDIN pin
         *  SDIN1 is define at BIT2 & BIT3
         *  SDIN2 is define at BIT4 & BIT5
         *  SDIN3 is define at BIT6 & BIT7
         */
        #ifndef AZALIA_SDIN_PIN
        #define AZALIA_SDIN_PIN              0x2A
        #endif
        […]
        $ more src/mainboard/tyan/s8226/sb700_cfg.c
        […]
        	sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN;
        […]
    
    The 8 bit value 0x2A (binary 00 10 10 10), was being used incorrectly
    – I believe the original intent of this value was to enable the SDIN
    pins 0, 1, & 2. Because it was getting truncated as it was put into
    AzaliaSdin0, this wasn't happening and only SDIN0 was being enabled.
    
    I am leaving only SDIN0 enabled at this point to as not change the
    actual behavior on the platform.
    
    Change-Id: Icaeb956926309dbfb5af25a36ccb842877e17a34
    Signed-off-by: Martin Roth <martin.roth at se-eng.com>
---
 src/mainboard/tyan/s8226/sb700_cfg.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/mainboard/tyan/s8226/sb700_cfg.h b/src/mainboard/tyan/s8226/sb700_cfg.h
index 45d7a92..ddfa7df 100644
--- a/src/mainboard/tyan/s8226/sb700_cfg.h
+++ b/src/mainboard/tyan/s8226/sb700_cfg.h
@@ -191,8 +191,7 @@
  *  SDIN3 is define at BIT6 & BIT7
  */
 #ifndef AZALIA_SDIN_PIN
-//#define AZALIA_SDIN_PIN             0xAA
-#define AZALIA_SDIN_PIN               0x2A
+#define AZALIA_SDIN_PIN              0x02
 #endif
 
 /**



More information about the coreboot mailing list