[coreboot] Patch set updated for coreboot: 2b68c88 IOAPIC: Divide setup_ioapic() in two parts.

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Tue Feb 26 19:56:54 CET 2013


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/300

-gerrit

commit 2b68c88a9f1f20b3eb30a32562b7302050d0e891
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Jan 31 17:24:12 2012 +0200

    IOAPIC: Divide setup_ioapic() in two parts.
    
    Currently some southbridge codes implement the set_ioapic_id() part
    locally and do not implement the load_vectors() part at all.
    This change allows clean-up of those southbridges without introducing
    changed behaviour.
    
    Change-Id: Ic5e860b9b669ecd1e9ddac4bbb92d80bdb9c2fca
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/include/arch/ioapic.h |  1 +
 src/arch/x86/lib/ioapic.c          | 19 ++++++++++++++-----
 2 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/src/arch/x86/include/arch/ioapic.h b/src/arch/x86/include/arch/ioapic.h
index 01fd753..b989e52 100644
--- a/src/arch/x86/include/arch/ioapic.h
+++ b/src/arch/x86/include/arch/ioapic.h
@@ -39,6 +39,7 @@
 #define SMI		(2 << 8)
 #define INT		(1 << 8)
 
+void set_ioapic_id(u32 ioapic_base, u8 ioapic_id);
 void setup_ioapic(u32 ioapic_base, u8 ioapic_id);
 void clear_ioapic(u32 ioapic_base);
 #endif
diff --git a/src/arch/x86/lib/ioapic.c b/src/arch/x86/lib/ioapic.c
index fc5e307..6243f55 100644
--- a/src/arch/x86/lib/ioapic.c
+++ b/src/arch/x86/lib/ioapic.c
@@ -74,11 +74,9 @@ void clear_ioapic(u32 ioapic_base)
 	}
 }
 
-void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
+void set_ioapic_id(u32 ioapic_base, u8 ioapic_id)
 {
 	u32 bsp_lapicid = lapicid();
-	u32 low, high;
-	u32 i, ioapic_interrupts;
 
 	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n",
 	       ioapic_base);
@@ -92,6 +90,13 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
 			(io_apic_read(ioapic_base, 0x00) & 0xf0ffffff) |
 			(ioapic_id << 24));
 	}
+}
+
+static void load_vectors(u32 ioapic_base)
+{
+	u32 bsp_lapicid = lapicid();
+	u32 low, high;
+	u32 i, ioapic_interrupts;
 
 	ioapic_interrupts = ioapic_interrupt_count(ioapic_base);
 
@@ -123,10 +128,8 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
 
 	printk(BIOS_SPEW, "IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n",
 	       0, high, low);
-
 	low = DISABLED;
 	high = NONE;
-
 	for (i = 1; i < ioapic_interrupts; i++) {
 		io_apic_write(ioapic_base, i * 2 + 0x10, low);
 		io_apic_write(ioapic_base, i * 2 + 0x11, high);
@@ -135,3 +138,9 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
 		       i, high, low);
 	}
 }
+
+void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
+{
+	set_ioapic_id(ioapic_base, ioapic_id);
+	load_vectors(ioapic_base);
+}



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