[coreboot] Patch merged into coreboot/master: 6a503b6 make early serial console support more generic

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 6a503b6a0f08bf4236c4c37d75c67182a7af4b02
Author: David Hendricks <dhendrix at chromium.org>
Date:   Mon Dec 31 17:28:43 2012 -0800

    make early serial console support more generic
    
    This patch makes pre-RAM serial init more generic, particularly for
    platforms which do not necessarily need cache-as-RAM in order to use
    the serial console and do not have a standard 8250 serial port.
    
    This adds a Kconfig variable to set romstage-* for very early serial
    console init. The current method assumes that cache-as-RAM should
    enable this, so to maintain compatibility selecting CACHE_AS_RAM will
    also select EARLY_SERIAL_CONSOLE.
    
    The UART code structure needs some rework, but the use of ROMCC,
    romstage, and then ramstage makes things complex.
    
    uart.h now includes all .h files for all uarts. All 2 of them.
    This is actually a simplifying change.
    
    Change-Id: I089e7af633c227baf3c06c685f005e9d0e4b38ce
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
    Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
    Reviewed-on: http://review.coreboot.org/2086
    Tested-by: build bot (Jenkins)

Build-Tested: build bot (Jenkins) at Fri Jan  4 01:30:21 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Fri Jan  4 01:36:27 2013, giving +2
See http://review.coreboot.org/2086 for details.

-gerrit