[coreboot] New patch to review for coreboot: 9ae4509 ARM bootblock approach (incomplete)
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Wed Jan 9 02:27:05 CET 2013
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2118
-gerrit
commit 9ae4509487f951abe921b5647ffa1fa953bf6617
Author: Stefan Reinauer <stefan.reinauer at coreboot.org>
Date: Wed Jan 9 02:25:43 2013 +0100
ARM bootblock approach (incomplete)
Do not attempt to commit, just making this available so it doesn't get lost
Change-Id: I9cc2a8191d2db38b27b6363ba673e5a360de9684
Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
src/arch/armv7/Makefile.inc | 23 +++++------
src/arch/armv7/bootblock.inc | 82 +++++++++++++++++++++++++++++++++++++++
src/arch/armv7/bootblock.lds | 49 +++++++++++++++++++++++
src/arch/armv7/bootblock_simple.c | 12 +-----
src/arch/armv7/lib/id.lds | 2 +-
5 files changed, 142 insertions(+), 26 deletions(-)
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index d7fbbdf..7702859 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -223,19 +223,14 @@ $(obj)/coreboot.pre: $(objcbfs)/romstage_xip.elf $(obj)/coreboot.pre1 $(CBFSTOOL
################################################################################
# Build the bootblock
-#bootblock_lds = $(src)/arch/armv7/ldscript_fallback_cbfs.lb
-bootblock_lds = $(src)/arch/armv7/lib/id.lds
-#bootblock_lds = $(src)/arch/armv7/romstage.ld
+bootblock_lds = $(src)/arch/armv7/bootblock.lds
+bootblock_lds += $(src)/arch/armv7/lib/id.lds
bootblock_lds += $(chipset_bootblock_lds)
+bootblock_inc += $(src)/arch/armv7/bootblock.inc
bootblock_inc += $(src)/arch/armv7/lib/id.inc
bootblock_inc += $(chipset_bootblock_inc)
-
-# FIXME: CONFIG_NEON or something similar for ARM?
-#ifeq ($(CONFIG_SSE),y)
-#bootblock_inc += $(src)/cpu/x86/sse_enable.inc
-#endif
-#bootblock_inc += $(objgenerated)/bootblock.inc
+bootblock_inc += $(objgenerated)/bootblock.inc
$(objgenerated)/bootblock.ld: $$(bootblock_lds) $(obj)/ldoptions
@printf " GEN $(subst $(obj)/,,$(@))\n"
@@ -253,11 +248,11 @@ $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(o
@printf " CC $(subst $(obj)/,,$(@))\n"
$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
-#$(objgenerated)/bootblock.inc: $(src)/arch/armv7/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
-# @printf " ROMCC $(subst $(obj)/,,$(@))\n"
-# $(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \
-# $< > $(objgenerated)/bootblock.inc.d
-# $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) $< -o $@
+$(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(OPTION_TABLE_H)
+ @printf " ROMCC $(subst $(obj)/,,$(@))\n"
+ $(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \
+ $< > $(objgenerated)/bootblock.inc.d
+ $(CC) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@
$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld
@printf " LINK $(subst $(obj)/,,$(@))\n"
diff --git a/src/arch/armv7/bootblock.inc b/src/arch/armv7/bootblock.inc
new file mode 100644
index 0000000..971b5eb
--- /dev/null
+++ b/src/arch/armv7/bootblock.inc
@@ -0,0 +1,82 @@
+/*
+ * Early initialization code for ARMv7 architecture.
+ *
+ * This file is based off of the OMAP3530/ARM Cortex start.S file from Das
+ * U-Boot, which itself got the file from armboot.
+ *
+ * Copyright (c) 2004 Texas Instruments <r-woodruff2 at ti.com>
+ * Copyright (c) 2001 Marius Gröger <mag at sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu at sysgo.de>
+ * Copyright (c) 2002 Gary Jennejohn <garyj at denx.de>
+ * Copyright (c) 2003 Richard Woodruff <r-woodruff2 at ti.com>
+ * Copyright (c) 2003 Kshitij <kshitij at ti.com>
+ * Copyright (c) 2006-2008 Syed Mohammed Khasim <x0khasim at ti.com>
+ * Copyright (c) 2013 The Chromium OS Authors
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <system.h>
+
+_bl1:
+ /* For now we have to live with a first stage boot loader
+ * on ARM, which is 8KB in size and it is prepended to the
+ * reset vector
+ */
+ .skip 8192
+
+.globl _start
+_start: b reset
+ .balignl 16,0xdeadbeef
+
+_cbfs_master_header:
+ /* The CBFS master header is inserted here by cbfstool
+ * when coreboot.rom is being created. Hence, we leave
+ * some space for it.
+ */
+ .skip 64
+
+reset:
+ /*
+ * set the cpu to SVC32 mode
+ */
+ mrs r0, cpsr
+ bic r0, r0, #0x1f
+ orr r0, r0, #0xd3
+ msr cpsr,r0
+
+ /*
+ * From Cortex-A Series Programmer's Guide:
+ * Only CPU 0 performs initialization. Other CPUs go into WFI
+ * to do this, first work out which CPU this is
+ * this code typically is run before any other initialization step
+ */
+ mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register
+ and r1, r1, #0x3 @ Extract CPU ID bits
+ cmp r1, #0
+ bne wait_for_interrupt @ If this is not core0, wait
+
+/* Set stackpointer in internal RAM to call board_init_f */
+call_bootblock:
+ ldr sp, =(0x0204F800) /* Set up stack pointer */
+ mov sp, r0
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
+ ldr r0,=0x00000000
+ bl main
+
+wait_for_interrupt:
+ wfi
+ mov pc, lr @ back to my caller
diff --git a/src/arch/armv7/bootblock.lds b/src/arch/armv7/bootblock.lds
new file mode 100644
index 0000000..90e37a0
--- /dev/null
+++ b/src/arch/armv7/bootblock.lds
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2006 Advanced Micro Devices, Inc.
+ * Copyright (C) 2008-2010 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* We use ELF as output format. So that we can debug the code in some form. */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+TARGET(binary)
+SECTIONS
+{
+ ROMLOC = 0x2023400 - 8192;
+
+ /* This section might be better named .setup */
+ .rom ROMLOC : {
+ _rom = .;
+ *(.text);
+ *(.text.*);
+ *(.rom.text);
+ *(.rom.data);
+ *(.rom.data.*);
+ *(.rodata.*);
+ _erom = .;
+ } = 0xff
+
+ /DISCARD/ : {
+ *(.comment)
+ *(.note)
+ *(.comment.*)
+ *(.note.*)
+ *(.ARM.*)
+ }
+}
diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/armv7/bootblock_simple.c
index f447a29..64da46c 100644
--- a/src/arch/armv7/bootblock_simple.c
+++ b/src/arch/armv7/bootblock_simple.c
@@ -23,24 +23,14 @@
#include <bootblock_common.h>
-
-#include "../../lib/uart8250.c"
-#include "lib/div.c"
-
-struct uart8250 uart = {
- 115200
-};
-
void main(unsigned long bist)
{
- init_uart8250(CONFIG_TTYS0_BASE, &uart);
- uart8250_tx_byte(CONFIG_TTYS0_BASE, '@');
-
if (boot_cpu()) {
bootblock_cpu_init();
bootblock_northbridge_init();
bootblock_southbridge_init();
}
+
const char* target1 = "fallback/romstage";
unsigned long entry;
entry = findstage(target1);
diff --git a/src/arch/armv7/lib/id.lds b/src/arch/armv7/lib/id.lds
index 9e31ee6..22b4a02 100644
--- a/src/arch/armv7/lib/id.lds
+++ b/src/arch/armv7/lib/id.lds
@@ -1,5 +1,5 @@
SECTIONS {
- . = (0x100000000 - CONFIG_ID_SECTION_OFFSET) - (__id_end - __id_start);
+ . = (0x2024000) - (__id_end - __id_start);
.id (.): {
*(.id)
}
More information about the coreboot
mailing list