[coreboot] Patch merged into coreboot/master: 105da50 AMD: Set the mask of MTRR according to CONFIG_CPU_ADDR_BITS

gerrit at coreboot.org gerrit at coreboot.org
Fri Jan 11 00:42:08 CET 2013

the following patch was just integrated into master:
commit 105da50df4fe6073575a2eb6247d916746b6143e
Author: Zheng Bao <fishbaozi at gmail.com>
Date:   Sat Jan 5 12:17:46 2013 +0800

    AMD: Set the mask of MTRR according to CONFIG_CPU_ADDR_BITS
    The high bits of mtrr mask are MBZ (Must be zero). Writing 1 to these
    bits will cause exception. So be carefull when spread this change.
    The supermicro/h8scm needs more work. Currently it is set as it was.
    We need to check if the F10 and F15 have different value.
    Change-Id: I2dd8bf07ecee2fe4d1721cec6b21623556e68947
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: zbao <fishbaozi at gmail.com>
    Reviewed-on: http://review.coreboot.org/1661
    Tested-by: build bot (Jenkins)
    Reviewed-by: Marc Jones <marcj303 at gmail.com>

Build-Tested: build bot (Jenkins) at Sat Jan  5 03:52:46 2013, giving +1
Reviewed-By: Marc Jones <marcj303 at gmail.com> at Fri Jan 11 00:42:07 2013, giving +2
See http://review.coreboot.org/1661 for details.


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