[coreboot] Patch set updated for coreboot: 2b9f9b5 Fam14 DSDT: Add secondary bus range to PCI0
Paul Menzel (paulepanter@users.sourceforge.net)
gerrit at coreboot.org
Thu Mar 7 14:26:37 CET 2013
Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2592
-gerrit
commit 2b9f9b55bbb33ead7ed60d152f250dba3b5c383f
Author: Mike Loptien <mike.loptien at se-eng.com>
Date: Tue Mar 5 14:21:28 2013 -0700
Fam14 DSDT: Add secondary bus range to PCI0
Adding the 'WordBusNumber' macro to the PCI0
CRES ResourceTemplate in the Persimmon DSDT.
This sets up the bus number for the PCI0 device
and the secondary bus number for the CRS method.
This change came in response to a 'dmesg' error
which states:
'[FIRMWARE BUG]: ACPI: no secondary bus range in _CRS'
By adding the 'WordBusNumber' macro, ACPI can set
up a valid range for the PCIe downstream busses,
thereby relieving the Linux kernel from "guessing"
the valid range based off _BBN or assuming [0-0xFF].
The Linux kernel code that checks this bus range is
in `drivers/acpi/pci_root.c`.
Change-Id: I44f22bc03a0dcbcd2594d4291508826cc2146860
Signed-off-by: Mike Loptien <mike.loptien at se-eng.com>
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
src/mainboard/amd/persimmon/dsdt.asl | 9 +++++++++
src/mainboard/asrock/e350m1/dsdt.asl | 9 +++++++++
src/mainboard/lippert/frontrunner-af/dsdt.asl | 10 ++++++++++
3 files changed, 28 insertions(+)
diff --git a/src/mainboard/amd/persimmon/dsdt.asl b/src/mainboard/amd/persimmon/dsdt.asl
index 582ab7f..8cf86eb 100644
--- a/src/mainboard/amd/persimmon/dsdt.asl
+++ b/src/mainboard/amd/persimmon/dsdt.asl
@@ -1477,6 +1477,15 @@ DefinitionBlock (
} /* end Ac97modem */
Name(CRES, ResourceTemplate() {
+ /* Set the bus number and secondary bus number for the PCI0 device. */
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, /* address granularity */
+ 0x0000, /* range minimum */
+ 0x00FE, /* range maximum */
+ 0x0000, /* translation */
+ 0x00FF, /* length */
+ ,, PSB0) /* ResourceSourceIndex, ResourceSource, DescriptorName */
+
IO(Decode16, 0x0CF8, 0x0CF8, 1, 8)
WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
diff --git a/src/mainboard/asrock/e350m1/dsdt.asl b/src/mainboard/asrock/e350m1/dsdt.asl
index bc45435..570e7c4 100644
--- a/src/mainboard/asrock/e350m1/dsdt.asl
+++ b/src/mainboard/asrock/e350m1/dsdt.asl
@@ -1477,6 +1477,15 @@ DefinitionBlock (
} /* end Ac97modem */
Name(CRES, ResourceTemplate() {
+ /* Set the bus number and secondary bus number for the PCI0 device. */
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, /* address granularity */
+ 0x0000, /* range minimum */
+ 0x00FE, /* range maximum */
+ 0x0000, /* translation */
+ 0x00FF, /* length */
+ ,, PSB0) /* ResourceSourceIndex, ResourceSource, DescriptorName */
+
IO(Decode16, 0x0CF8, 0x0CF8, 1, 8)
WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
diff --git a/src/mainboard/lippert/frontrunner-af/dsdt.asl b/src/mainboard/lippert/frontrunner-af/dsdt.asl
index d3b88f7..599c32f 100644
--- a/src/mainboard/lippert/frontrunner-af/dsdt.asl
+++ b/src/mainboard/lippert/frontrunner-af/dsdt.asl
@@ -1480,6 +1480,16 @@ DefinitionBlock (
Name(CRES, ResourceTemplate() {
IO(Decode16, 0x004E, 0x004E, 1, 2) /* SIO config regs */
IO(Decode16, 0x0E00, 0x0E00, 1, 0x80) /* SIO runtime regs */
+
+ /* Set the bus number and secondary bus number for the PCI0 device. */
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, /* address granularity */
+ 0x0000, /* range minimum */
+ 0x00FE, /* range maximum */
+ 0x0000, /* translation */
+ 0x00FF, /* length */
+ ,, PSB0) /* ResourceSourceIndex, ResourceSource, DescriptorName */
+
IO(Decode16, 0x0CF8, 0x0CF8, 1, 8)
WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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