[coreboot] Patch merged into coreboot/master: 00d673d FrontRunner/Toucan-AF: lower SPI speed to 22 MHz

gerrit at coreboot.org gerrit at coreboot.org
Fri Mar 8 00:56:20 CET 2013

the following patch was just integrated into master:
commit 00d673d165006b28bbbe5b2d84ef80d8665d8f34
Author: Jens Rottmann <JRottmann at LiPPERTembedded.de>
Date:   Thu Mar 7 19:02:15 2013 +0100

    FrontRunner/Toucan-AF: lower SPI speed to 22 MHz
    The Hudson-E1's default SPI speed for normal i.e. non-fast reads is 66 MHz,
    but the SST 25VF032B datasheet allows max. 25.  Lower the speed to 22 MHz,
    otherwise BIOS flashing fails.
    Change-Id: I22e87d833a3ebd316b6e873595a2480831533ab1
    Signed-off-by: Jens Rottmann <JRottmann at LiPPERTembedded.de>
    Reviewed-on: http://review.coreboot.org/2605
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>

Build-Tested: build bot (Jenkins) at Thu Mar  7 19:29:33 2013, giving +1
See http://review.coreboot.org/2605 for details.


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